simulador bby
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commit
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@ -79,8 +79,8 @@ def simular_LTS(tensionCap, Rtotal, Lbobina, Ctotal, lts_path, tSim = 100e-3, to
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'''
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'''
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modeloSim = "src/simulador/modelo_transitorio.asc"
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modeloSim = "simulador/modelo_transitorio.asc"
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outDir = 'src/simulador'
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outDir = 'simulador'
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## Hago la simulacion
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## Hago la simulacion
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@ -125,9 +125,13 @@ def simular_LTS(tensionCap, Rtotal, Lbobina, Ctotal, lts_path, tSim = 100e-3, to
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if __name__ == '__main__':
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if __name__ == '__main__':
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<<<<<<< HEAD
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import matplotlib.pyplot as plt
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import matplotlib.pyplot as plt
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lts_path = "C:/Users/osuescuneli/AppData/Local/Programs/ADI/LTspice/LTspice.exe"
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lts_path = "C:/Users/osuescuneli/AppData/Local/Programs/ADI/LTspice/LTspice.exe"
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=======
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lts_path = "D:\\Appdata\\LTSpice\\LTSPice.exe"
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>>>>>>> a2d05aa067ff48217660c219d56c5865db470197
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Tension = 300
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Tension = 300
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Resistencia = 10
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Resistencia = 10
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@ -1,5 +1,10 @@
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<<<<<<< HEAD
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* C:\Users\pedro\Desktop\Projects\LaunchSim\src\simulador\modelo_transitorio.asc
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* Generated by LTspice 24.1.4 for Windows.
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=======
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* C:\Users\osuescuneli\Desktop\practicas\Practia_Lanzadera\source\src\simulador\modelo_transitorio.asc
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* C:\Users\osuescuneli\Desktop\practicas\Practia_Lanzadera\source\src\simulador\modelo_transitorio.asc
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* Generated by LTspice 24.1.5 for Windows.
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* Generated by LTspice 24.1.5 for Windows.
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>>>>>>> 04076e92921df836051a54c4429533fbd2cea3a7
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V1 N001 0 {V}
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V1 N001 0 {V}
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S1 N001 condensador cont1 0 SW
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S1 N001 condensador cont1 0 SW
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V2 cont1 0 PULSE(0 10 0 1n 1n {toff_sw} {tsim})
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V2 cont1 0 PULSE(0 10 0 1n 1n {toff_sw} {tsim})
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@ -12,7 +17,7 @@ V4 N002 N003 30
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R2 N002 N003 20
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R2 N002 N003 20
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.model NMOS NMOS
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.model NMOS NMOS
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.model PMOS PMOS
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.model PMOS PMOS
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.lib C:\Users\osuescuneli\AppData\Local\LTspice\lib\cmp\standard.mos
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.lib C:\Users\pedro\AppData\Local\LTspice\lib\cmp\standard.mos
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.tran 0 {tsim} 0
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.tran 0 {tsim} 0
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.Model SW SW(Ron=1m Roff=100Meg Vt = 5)
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.Model SW SW(Ron=1m Roff=100Meg Vt = 5)
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.param tsim 10
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.param tsim 10
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