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Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder.cpp

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+/*
+ * Alinear_encoder.cpp
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "Alinear_encoder.h"
+#include "Alinear_encoder_cal.h"
+#include "rtwtypes.h"
+#include "rte_Alinear_encoder_parameters.h"
+#include "Alinear_encoder_private.h"
+#include "zero_crossing_types.h"
+#include <cstring>
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+/* Block signals (default storage) */
+B_Alinear_encoder_T Alinear_encoder_B;
+
+/* Block states (default storage) */
+DW_Alinear_encoder_T Alinear_encoder_DW;
+
+/* Previous zero-crossings (trigger) states */
+PrevZCX_Alinear_encoder_T Alinear_encoder_PrevZCX;
+
+/* Real-time model */
+RT_MODEL_Alinear_encoder_T Alinear_encoder_M_ = RT_MODEL_Alinear_encoder_T();
+RT_MODEL_Alinear_encoder_T *const Alinear_encoder_M = &Alinear_encoder_M_;
+
+/* Model step function */
+void Alinear_encoder_step(void)
+{
+  boolean_T zcEvent;
+  ZCEventType zcEvent_0;
+
+  /* Reset subsysRan breadcrumbs */
+  srClearBC(Alinear_encoder_DW.TriggeredSubsystem_SubsysRanBC);
+
+  /* Reset subsysRan breadcrumbs */
+  srClearBC(Alinear_encoder_DW.NEGATIVEEdge_SubsysRanBC);
+
+  /* Reset subsysRan breadcrumbs */
+  srClearBC(Alinear_encoder_DW.POSITIVEEdge_SubsysRanBC);
+
+  /* Reset subsysRan breadcrumbs */
+  srClearBC(Alinear_encoder_DW.SampleandHold_SubsysRanBC);
+
+  /* Constant: '<Root>/Constant1' */
+  Alinear_encoder_B.Constant1 = Alinear_encoder_cal->Constant1_Value;
+
+  /* S-Function (sg_fpga_di_sf_a2): '<Root>/Encoder1' */
+
+  /* Level2 S-Function Block: '<Root>/Encoder1' (sg_fpga_di_sf_a2) */
+  {
+    SimStruct *rts = Alinear_encoder_M->childSfunctions[0];
+    sfcnOutputs(rts,0);
+  }
+
+  /* DataTypeConversion: '<S4>/Data Type Conversion2' */
+  Alinear_encoder_B.DataTypeConversion2 = (Alinear_encoder_B.Encoder1_o1 != 0.0);
+
+  /* Memory: '<S4>/Memory' */
+  Alinear_encoder_B.Memory = Alinear_encoder_DW.Memory_PreviousInput;
+
+  /* MultiPortSwitch: '<S4>/Multiport Switch' incorporates:
+   *  Constant: '<S4>/Constant1'
+   */
+  switch (static_cast<int32_T>(Alinear_encoder_cal->EdgeDetector_model)) {
+   case 1:
+    /* MultiPortSwitch: '<S4>/Multiport Switch' incorporates:
+     *  Constant: '<S4>/pos. edge'
+     */
+    Alinear_encoder_B.MultiportSwitch[0] = Alinear_encoder_cal->posedge_Value[0];
+    Alinear_encoder_B.MultiportSwitch[1] = Alinear_encoder_cal->posedge_Value[1];
+    break;
+
+   case 2:
+    /* MultiPortSwitch: '<S4>/Multiport Switch' incorporates:
+     *  Constant: '<S4>/neg. edge'
+     */
+    Alinear_encoder_B.MultiportSwitch[0] = Alinear_encoder_cal->negedge_Value[0];
+    Alinear_encoder_B.MultiportSwitch[1] = Alinear_encoder_cal->negedge_Value[1];
+    break;
+
+   default:
+    /* MultiPortSwitch: '<S4>/Multiport Switch' incorporates:
+     *  Constant: '<S4>/either edge'
+     */
+    Alinear_encoder_B.MultiportSwitch[0] = Alinear_encoder_cal->
+      eitheredge_Value[0];
+    Alinear_encoder_B.MultiportSwitch[1] = Alinear_encoder_cal->
+      eitheredge_Value[1];
+    break;
+  }
+
+  /* End of MultiPortSwitch: '<S4>/Multiport Switch' */
+
+  /* Outputs for Enabled SubSystem: '<S4>/POSITIVE Edge' incorporates:
+   *  EnablePort: '<S7>/Enable'
+   */
+  Alinear_encoder_DW.POSITIVEEdge_MODE = (Alinear_encoder_B.MultiportSwitch[0] >
+    0.0);
+  if (Alinear_encoder_DW.POSITIVEEdge_MODE) {
+    /* RelationalOperator: '<S7>/Relational Operator1' */
+    Alinear_encoder_B.RelationalOperator1 = (static_cast<int32_T>
+      (Alinear_encoder_B.Memory) < static_cast<int32_T>
+      (Alinear_encoder_B.DataTypeConversion2));
+    srUpdateBC(Alinear_encoder_DW.POSITIVEEdge_SubsysRanBC);
+  }
+
+  /* End of Outputs for SubSystem: '<S4>/POSITIVE Edge' */
+
+  /* Outputs for Enabled SubSystem: '<S4>/NEGATIVE Edge' incorporates:
+   *  EnablePort: '<S6>/Enable'
+   */
+  Alinear_encoder_DW.NEGATIVEEdge_MODE = (Alinear_encoder_B.MultiportSwitch[1] >
+    0.0);
+  if (Alinear_encoder_DW.NEGATIVEEdge_MODE) {
+    /* RelationalOperator: '<S6>/Relational Operator1' */
+    Alinear_encoder_B.RelationalOperator1_d = (static_cast<int32_T>
+      (Alinear_encoder_B.Memory) > static_cast<int32_T>
+      (Alinear_encoder_B.DataTypeConversion2));
+    srUpdateBC(Alinear_encoder_DW.NEGATIVEEdge_SubsysRanBC);
+  }
+
+  /* End of Outputs for SubSystem: '<S4>/NEGATIVE Edge' */
+
+  /* Logic: '<S4>/Logical Operator1' */
+  Alinear_encoder_B.LogicalOperator1 = (Alinear_encoder_B.RelationalOperator1 ||
+    Alinear_encoder_B.RelationalOperator1_d);
+
+  /* DataTypeConversion: '<S1>/Data Type Conversion' */
+  Alinear_encoder_B.DataTypeConversion = Alinear_encoder_B.LogicalOperator1;
+
+  /* Delay: '<S1>/Delay1' */
+  Alinear_encoder_B.Delay1 = Alinear_encoder_DW.Delay1_DSTATE;
+
+  /* Switch: '<S1>/Switch2' */
+  if (Alinear_encoder_B.Encoder1_o3 > Alinear_encoder_cal->Switch2_Threshold) {
+    /* Switch: '<S1>/Switch2' incorporates:
+     *  Constant: '<S1>/Constant'
+     */
+    Alinear_encoder_B.Switch2 = Alinear_encoder_cal->Constant_Value;
+  } else {
+    /* Logic: '<S1>/Logical Operator' */
+    Alinear_encoder_B.LogicalOperator = (Alinear_encoder_B.LogicalOperator1 &&
+      (Alinear_encoder_B.Encoder1_o2 != 0.0));
+
+    /* Switch: '<S1>/Switch' */
+    if (Alinear_encoder_B.LogicalOperator) {
+      /* Switch: '<S1>/Switch' */
+      Alinear_encoder_B.Switch = Alinear_encoder_B.DataTypeConversion;
+    } else {
+      /* Gain: '<S1>/Gain1' */
+      Alinear_encoder_B.Gain1 = Alinear_encoder_cal->Gain1_Gain *
+        Alinear_encoder_B.DataTypeConversion;
+
+      /* Switch: '<S1>/Switch' */
+      Alinear_encoder_B.Switch = Alinear_encoder_B.Gain1;
+    }
+
+    /* End of Switch: '<S1>/Switch' */
+
+    /* Sum: '<S1>/Sum' */
+    Alinear_encoder_B.Sum_l = Alinear_encoder_B.Switch +
+      Alinear_encoder_B.Delay1;
+
+    /* Switch: '<S1>/Switch2' */
+    Alinear_encoder_B.Switch2 = Alinear_encoder_B.Sum_l;
+  }
+
+  /* End of Switch: '<S1>/Switch2' */
+
+  /* Gain: '<S1>/CTE Encoder' */
+  Alinear_encoder_B.CTEEncoder = *get_cte_encoder() * Alinear_encoder_B.Switch2;
+
+  /* Sum: '<S1>/Sum2' incorporates:
+   *  Constant: '<S1>/Constant1'
+   */
+  Alinear_encoder_B.Sum2 = Alinear_encoder_B.CTEEncoder + *get_desfase_z_d();
+
+  /* Delay: '<S1>/Delay2' */
+  Alinear_encoder_B.Delay2 = Alinear_encoder_DW.Delay2_DSTATE[0];
+
+  /* Clock: '<S5>/Clock' */
+  Alinear_encoder_B.Clock = Alinear_encoder_M->Timing.t[0];
+
+  /* Outputs for Triggered SubSystem: '<S5>/Triggered Subsystem' incorporates:
+   *  TriggerPort: '<S8>/Trigger'
+   */
+  zcEvent = (Alinear_encoder_B.LogicalOperator1 &&
+             (Alinear_encoder_PrevZCX.TriggeredSubsystem_Trig_ZCE != POS_ZCSIG));
+  if (zcEvent) {
+    /* SignalConversion generated from: '<S8>/In1' */
+    Alinear_encoder_B.In1 = Alinear_encoder_B.Clock;
+    Alinear_encoder_DW.TriggeredSubsystem_SubsysRanBC = 4;
+  }
+
+  Alinear_encoder_PrevZCX.TriggeredSubsystem_Trig_ZCE =
+    Alinear_encoder_B.LogicalOperator1;
+
+  /* End of Outputs for SubSystem: '<S5>/Triggered Subsystem' */
+
+  /* Sum: '<S5>/Sum' incorporates:
+   *  Constant: '<S5>/Constant'
+   */
+  Alinear_encoder_B.Sum = Alinear_encoder_B.In1 +
+    Alinear_encoder_cal->Constant_Value_p;
+
+  /* RelationalOperator: '<S5>/Relational Operator' */
+  Alinear_encoder_B.RelationalOperator = (Alinear_encoder_B.Sum >
+    Alinear_encoder_B.Clock);
+
+  /* Sum: '<S1>/Sum1' */
+  Alinear_encoder_B.Sum1 = Alinear_encoder_B.CTEEncoder -
+    Alinear_encoder_B.Delay2;
+
+  /* Gain: '<S1>/Gain Velocidad' */
+  Alinear_encoder_B.GainVelocidad = *get_gain_velocidad() *
+    Alinear_encoder_B.Sum1;
+
+  /* Outputs for Triggered SubSystem: '<Root>/Sample and Hold' incorporates:
+   *  TriggerPort: '<S2>/Trigger'
+   */
+  zcEvent_0 = rt_ZCFcn(RISING_ZERO_CROSSING,
+                       &Alinear_encoder_PrevZCX.SampleandHold_Trig_ZCE,
+                       (Alinear_encoder_B.Encoder1_o3));
+  if (zcEvent_0 != NO_ZCEVENT) {
+    /* SignalConversion generated from: '<S2>/In' */
+    Alinear_encoder_B.In = Alinear_encoder_B.Sum2;
+    Alinear_encoder_DW.SampleandHold_SubsysRanBC = 4;
+  }
+
+  /* End of Outputs for SubSystem: '<Root>/Sample and Hold' */
+  /* user code (Output function Trailer) */
+  {
+  }
+
+  /* Update for Memory: '<S4>/Memory' */
+  Alinear_encoder_DW.Memory_PreviousInput =
+    Alinear_encoder_B.DataTypeConversion2;
+
+  /* Update for Delay: '<S1>/Delay1' */
+  Alinear_encoder_DW.Delay1_DSTATE = Alinear_encoder_B.Switch2;
+
+  /* Update for Delay: '<S1>/Delay2' */
+  for (int32_T idxDelay = 0; idxDelay < 199; idxDelay++) {
+    Alinear_encoder_DW.Delay2_DSTATE[idxDelay] =
+      Alinear_encoder_DW.Delay2_DSTATE[idxDelay + 1];
+  }
+
+  Alinear_encoder_DW.Delay2_DSTATE[199] = Alinear_encoder_B.CTEEncoder;
+
+  /* End of Update for Delay: '<S1>/Delay2' */
+
+  /* Update absolute time for base rate */
+  /* The "clockTick0" counts the number of times the code of this task has
+   * been executed. The absolute time is the multiplication of "clockTick0"
+   * and "Timing.stepSize0". Size of "clockTick0" ensures timer will not
+   * overflow during the application lifespan selected.
+   * Timer of this task consists of two 32 bit unsigned integers.
+   * The two integers represent the low bits Timing.clockTick0 and the high bits
+   * Timing.clockTickH0. When the low bit overflows to 0, the high bits increment.
+   */
+  if (!(++Alinear_encoder_M->Timing.clockTick0)) {
+    ++Alinear_encoder_M->Timing.clockTickH0;
+  }
+
+  Alinear_encoder_M->Timing.t[0] = Alinear_encoder_M->Timing.clockTick0 *
+    Alinear_encoder_M->Timing.stepSize0 + Alinear_encoder_M->Timing.clockTickH0 *
+    Alinear_encoder_M->Timing.stepSize0 * 4294967296.0;
+
+  {
+    /* Update absolute timer for sample time: [4.0E-5s, 0.0s] */
+    /* The "clockTick1" counts the number of times the code of this task has
+     * been executed. The absolute time is the multiplication of "clockTick1"
+     * and "Timing.stepSize1". Size of "clockTick1" ensures timer will not
+     * overflow during the application lifespan selected.
+     * Timer of this task consists of two 32 bit unsigned integers.
+     * The two integers represent the low bits Timing.clockTick1 and the high bits
+     * Timing.clockTickH1. When the low bit overflows to 0, the high bits increment.
+     */
+    if (!(++Alinear_encoder_M->Timing.clockTick1)) {
+      ++Alinear_encoder_M->Timing.clockTickH1;
+    }
+
+    Alinear_encoder_M->Timing.t[1] = Alinear_encoder_M->Timing.clockTick1 *
+      Alinear_encoder_M->Timing.stepSize1 +
+      Alinear_encoder_M->Timing.clockTickH1 *
+      Alinear_encoder_M->Timing.stepSize1 * 4294967296.0;
+  }
+}
+
+/* Model initialize function */
+void Alinear_encoder_initialize(void)
+{
+  /* Registration code */
+
+  /* initialize non-finites */
+  rt_InitInfAndNaN(sizeof(real_T));
+
+  {
+    /* Setup solver object */
+    rtsiSetSimTimeStepPtr(&Alinear_encoder_M->solverInfo,
+                          &Alinear_encoder_M->Timing.simTimeStep);
+    rtsiSetTPtr(&Alinear_encoder_M->solverInfo, &rtmGetTPtr(Alinear_encoder_M));
+    rtsiSetStepSizePtr(&Alinear_encoder_M->solverInfo,
+                       &Alinear_encoder_M->Timing.stepSize0);
+    rtsiSetErrorStatusPtr(&Alinear_encoder_M->solverInfo, (&rtmGetErrorStatus
+      (Alinear_encoder_M)));
+    rtsiSetRTModelPtr(&Alinear_encoder_M->solverInfo, Alinear_encoder_M);
+  }
+
+  rtsiSetSimTimeStep(&Alinear_encoder_M->solverInfo, MAJOR_TIME_STEP);
+  rtsiSetIsMinorTimeStepWithModeChange(&Alinear_encoder_M->solverInfo, false);
+  rtsiSetIsContModeFrozen(&Alinear_encoder_M->solverInfo, false);
+  rtsiSetSolverName(&Alinear_encoder_M->solverInfo,"FixedStepDiscrete");
+  Alinear_encoder_M->solverInfoPtr = (&Alinear_encoder_M->solverInfo);
+
+  /* Initialize timing info */
+  {
+    int_T *mdlTsMap = Alinear_encoder_M->Timing.sampleTimeTaskIDArray;
+    mdlTsMap[0] = 0;
+    mdlTsMap[1] = 1;
+    Alinear_encoder_M->Timing.sampleTimeTaskIDPtr = (&mdlTsMap[0]);
+    Alinear_encoder_M->Timing.sampleTimes =
+      (&Alinear_encoder_M->Timing.sampleTimesArray[0]);
+    Alinear_encoder_M->Timing.offsetTimes =
+      (&Alinear_encoder_M->Timing.offsetTimesArray[0]);
+
+    /* task periods */
+    Alinear_encoder_M->Timing.sampleTimes[0] = (0.0);
+    Alinear_encoder_M->Timing.sampleTimes[1] = (4.0E-5);
+
+    /* task offsets */
+    Alinear_encoder_M->Timing.offsetTimes[0] = (0.0);
+    Alinear_encoder_M->Timing.offsetTimes[1] = (0.0);
+  }
+
+  rtmSetTPtr(Alinear_encoder_M, &Alinear_encoder_M->Timing.tArray[0]);
+
+  {
+    int_T *mdlSampleHits = Alinear_encoder_M->Timing.sampleHitArray;
+    mdlSampleHits[0] = 1;
+    mdlSampleHits[1] = 1;
+    Alinear_encoder_M->Timing.sampleHits = (&mdlSampleHits[0]);
+  }
+
+  rtmSetTFinal(Alinear_encoder_M, -1);
+  Alinear_encoder_M->Timing.stepSize0 = 4.0E-5;
+  Alinear_encoder_M->Timing.stepSize1 = 4.0E-5;
+  Alinear_encoder_M->solverInfoPtr = (&Alinear_encoder_M->solverInfo);
+  Alinear_encoder_M->Timing.stepSize = (4.0E-5);
+  rtsiSetFixedStepSize(&Alinear_encoder_M->solverInfo, 4.0E-5);
+  rtsiSetSolverMode(&Alinear_encoder_M->solverInfo, SOLVER_MODE_SINGLETASKING);
+
+  /* block I/O */
+  (void) std::memset((static_cast<void *>(&Alinear_encoder_B)), 0,
+                     sizeof(B_Alinear_encoder_T));
+
+  /* states (dwork) */
+  (void) std::memset(static_cast<void *>(&Alinear_encoder_DW), 0,
+                     sizeof(DW_Alinear_encoder_T));
+
+  /* child S-Function registration */
+  {
+    RTWSfcnInfo *sfcnInfo = &Alinear_encoder_M->NonInlinedSFcns.sfcnInfo;
+    Alinear_encoder_M->sfcnInfo = (sfcnInfo);
+    rtssSetErrorStatusPtr(sfcnInfo, (&rtmGetErrorStatus(Alinear_encoder_M)));
+    Alinear_encoder_M->Sizes.numSampTimes = (2);
+    rtssSetNumRootSampTimesPtr(sfcnInfo, &Alinear_encoder_M->Sizes.numSampTimes);
+    Alinear_encoder_M->NonInlinedSFcns.taskTimePtrs[0] = (&rtmGetTPtr
+      (Alinear_encoder_M)[0]);
+    Alinear_encoder_M->NonInlinedSFcns.taskTimePtrs[1] = (&rtmGetTPtr
+      (Alinear_encoder_M)[1]);
+    rtssSetTPtrPtr(sfcnInfo,Alinear_encoder_M->NonInlinedSFcns.taskTimePtrs);
+    rtssSetTStartPtr(sfcnInfo, &rtmGetTStart(Alinear_encoder_M));
+    rtssSetTFinalPtr(sfcnInfo, &rtmGetTFinal(Alinear_encoder_M));
+    rtssSetTimeOfLastOutputPtr(sfcnInfo, &rtmGetTimeOfLastOutput
+      (Alinear_encoder_M));
+    rtssSetStepSizePtr(sfcnInfo, &Alinear_encoder_M->Timing.stepSize);
+    rtssSetStopRequestedPtr(sfcnInfo, &rtmGetStopRequested(Alinear_encoder_M));
+    rtssSetDerivCacheNeedsResetPtr(sfcnInfo,
+      &Alinear_encoder_M->derivCacheNeedsReset);
+    rtssSetZCCacheNeedsResetPtr(sfcnInfo, &Alinear_encoder_M->zCCacheNeedsReset);
+    rtssSetContTimeOutputInconsistentWithStateAtMajorStepPtr(sfcnInfo,
+      &Alinear_encoder_M->CTOutputIncnstWithState);
+    rtssSetSampleHitsPtr(sfcnInfo, &Alinear_encoder_M->Timing.sampleHits);
+    rtssSetPerTaskSampleHitsPtr(sfcnInfo,
+      &Alinear_encoder_M->Timing.perTaskSampleHits);
+    rtssSetSimModePtr(sfcnInfo, &Alinear_encoder_M->simMode);
+    rtssSetSolverInfoPtr(sfcnInfo, &Alinear_encoder_M->solverInfoPtr);
+  }
+
+  Alinear_encoder_M->Sizes.numSFcns = (1);
+
+  /* register each child */
+  {
+    (void) std::memset(static_cast<void *>
+                       (&Alinear_encoder_M->NonInlinedSFcns.childSFunctions[0]),
+                       0,
+                       1*sizeof(SimStruct));
+    Alinear_encoder_M->childSfunctions =
+      (&Alinear_encoder_M->NonInlinedSFcns.childSFunctionPtrs[0]);
+    Alinear_encoder_M->childSfunctions[0] =
+      (&Alinear_encoder_M->NonInlinedSFcns.childSFunctions[0]);
+
+    /* Level2 S-Function Block: Alinear_encoder/<Root>/Encoder1 (sg_fpga_di_sf_a2) */
+    {
+      SimStruct *rts = Alinear_encoder_M->childSfunctions[0];
+
+      /* timing info */
+      time_T *sfcnPeriod = Alinear_encoder_M->NonInlinedSFcns.Sfcn0.sfcnPeriod;
+      time_T *sfcnOffset = Alinear_encoder_M->NonInlinedSFcns.Sfcn0.sfcnOffset;
+      int_T *sfcnTsMap = Alinear_encoder_M->NonInlinedSFcns.Sfcn0.sfcnTsMap;
+      (void) std::memset(static_cast<void*>(sfcnPeriod), 0,
+                         sizeof(time_T)*1);
+      (void) std::memset(static_cast<void*>(sfcnOffset), 0,
+                         sizeof(time_T)*1);
+      ssSetSampleTimePtr(rts, &sfcnPeriod[0]);
+      ssSetOffsetTimePtr(rts, &sfcnOffset[0]);
+      ssSetSampleTimeTaskIDPtr(rts, sfcnTsMap);
+
+      {
+        ssSetBlkInfo2Ptr(rts, &Alinear_encoder_M->NonInlinedSFcns.blkInfo2[0]);
+      }
+
+      _ssSetBlkInfo2PortInfo2Ptr(rts,
+        &Alinear_encoder_M->NonInlinedSFcns.inputOutputPortInfo2[0]);
+
+      /* Set up the mdlInfo pointer */
+      ssSetRTWSfcnInfo(rts, Alinear_encoder_M->sfcnInfo);
+
+      /* Allocate memory of model methods 2 */
+      {
+        ssSetModelMethods2(rts, &Alinear_encoder_M->NonInlinedSFcns.methods2[0]);
+      }
+
+      /* Allocate memory of model methods 3 */
+      {
+        ssSetModelMethods3(rts, &Alinear_encoder_M->NonInlinedSFcns.methods3[0]);
+      }
+
+      /* Allocate memory of model methods 4 */
+      {
+        ssSetModelMethods4(rts, &Alinear_encoder_M->NonInlinedSFcns.methods4[0]);
+      }
+
+      /* Allocate memory for states auxilliary information */
+      {
+        ssSetStatesInfo2(rts, &Alinear_encoder_M->NonInlinedSFcns.statesInfo2[0]);
+        ssSetPeriodicStatesInfo(rts,
+          &Alinear_encoder_M->NonInlinedSFcns.periodicStatesInfo[0]);
+      }
+
+      /* outputs */
+      {
+        ssSetPortInfoForOutputs(rts,
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.outputPortInfo[0]);
+        ssSetPortInfoForOutputs(rts,
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.outputPortInfo[0]);
+        _ssSetNumOutputPorts(rts, 3);
+        _ssSetPortInfo2ForOutputUnits(rts,
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.outputPortUnits[0]);
+        ssSetOutputPortUnit(rts, 0, 0);
+        ssSetOutputPortUnit(rts, 1, 0);
+        ssSetOutputPortUnit(rts, 2, 0);
+        _ssSetPortInfo2ForOutputCoSimAttribute(rts,
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.outputPortCoSimAttribute[0]);
+        ssSetOutputPortIsContinuousQuantity(rts, 0, 0);
+        ssSetOutputPortIsContinuousQuantity(rts, 1, 0);
+        ssSetOutputPortIsContinuousQuantity(rts, 2, 0);
+
+        /* port 0 */
+        {
+          _ssSetOutputPortNumDimensions(rts, 0, 1);
+          ssSetOutputPortWidthAsInt(rts, 0, 1);
+          ssSetOutputPortSignal(rts, 0, ((real_T *)
+            &Alinear_encoder_B.Encoder1_o1));
+        }
+
+        /* port 1 */
+        {
+          _ssSetOutputPortNumDimensions(rts, 1, 1);
+          ssSetOutputPortWidthAsInt(rts, 1, 1);
+          ssSetOutputPortSignal(rts, 1, ((real_T *)
+            &Alinear_encoder_B.Encoder1_o2));
+        }
+
+        /* port 2 */
+        {
+          _ssSetOutputPortNumDimensions(rts, 2, 1);
+          ssSetOutputPortWidthAsInt(rts, 2, 1);
+          ssSetOutputPortSignal(rts, 2, ((real_T *)
+            &Alinear_encoder_B.Encoder1_o3));
+        }
+      }
+
+      /* path info */
+      ssSetModelName(rts, "Encoder1");
+      ssSetPath(rts, "Alinear_encoder/Encoder1");
+      ssSetRTModel(rts,Alinear_encoder_M);
+      ssSetParentSS(rts, (NULL));
+      ssSetRootSS(rts, rts);
+      ssSetVersion(rts, SIMSTRUCT_VERSION_LEVEL2);
+
+      /* parameters */
+      {
+        mxArray **sfcnParams = (mxArray **)
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.params;
+        ssSetSFcnParamsCount(rts, 4);
+        ssSetSFcnParamsPtr(rts, &sfcnParams[0]);
+        ssSetSFcnParam(rts, 0, (mxArray*)Alinear_encoder_cal->Encoder1_P1_Size);
+        ssSetSFcnParam(rts, 1, (mxArray*)Alinear_encoder_cal->Encoder1_P2_Size);
+        ssSetSFcnParam(rts, 2, (mxArray*)Alinear_encoder_cal->Encoder1_P3_Size);
+        ssSetSFcnParam(rts, 3, (mxArray*)Alinear_encoder_cal->Encoder1_P4_Size);
+      }
+
+      /* work vectors */
+      ssSetPWork(rts, (void **) &Alinear_encoder_DW.Encoder1_PWORK[0]);
+
+      {
+        struct _ssDWorkRecord *dWorkRecord = (struct _ssDWorkRecord *)
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.dWork;
+        struct _ssDWorkAuxRecord *dWorkAuxRecord = (struct _ssDWorkAuxRecord *)
+          &Alinear_encoder_M->NonInlinedSFcns.Sfcn0.dWorkAux;
+        ssSetSFcnDWork(rts, dWorkRecord);
+        ssSetSFcnDWorkAux(rts, dWorkAuxRecord);
+        ssSetNumDWorkAsInt(rts, 1);
+
+        /* PWORK */
+        ssSetDWorkWidthAsInt(rts, 0, 2);
+        ssSetDWorkDataType(rts, 0,SS_POINTER);
+        ssSetDWorkComplexSignal(rts, 0, 0);
+        ssSetDWork(rts, 0, &Alinear_encoder_DW.Encoder1_PWORK[0]);
+      }
+
+      /* registration */
+      sg_fpga_di_sf_a2(rts);
+      sfcnInitializeSizes(rts);
+      sfcnInitializeSampleTimes(rts);
+
+      /* adjust sample time */
+      ssSetSampleTime(rts, 0, 4.0E-5);
+      ssSetOffsetTime(rts, 0, 0.0);
+      sfcnTsMap[0] = 1;
+
+      /* set compiled values of dynamic vector attributes */
+      ssSetNumNonsampledZCsAsInt(rts, 0);
+
+      /* Update connectivity flags for each port */
+      _ssSetOutputPortConnected(rts, 0, 1);
+      _ssSetOutputPortConnected(rts, 1, 1);
+      _ssSetOutputPortConnected(rts, 2, 1);
+      _ssSetOutputPortBeingMerged(rts, 0, 0);
+      _ssSetOutputPortBeingMerged(rts, 1, 0);
+      _ssSetOutputPortBeingMerged(rts, 2, 0);
+
+      /* Update the BufferDstPort flags for each input port */
+    }
+  }
+
+  /* Start for S-Function (sg_fpga_di_sf_a2): '<Root>/Encoder1' */
+  /* Level2 S-Function Block: '<Root>/Encoder1' (sg_fpga_di_sf_a2) */
+  {
+    SimStruct *rts = Alinear_encoder_M->childSfunctions[0];
+    sfcnStart(rts);
+    if (ssGetErrorStatus(rts) != (NULL))
+      return;
+  }
+
+  Alinear_encoder_PrevZCX.TriggeredSubsystem_Trig_ZCE = POS_ZCSIG;
+  Alinear_encoder_PrevZCX.SampleandHold_Trig_ZCE = UNINITIALIZED_ZCSIG;
+
+  {
+    int32_T i;
+
+    /* InitializeConditions for Memory: '<S4>/Memory' */
+    Alinear_encoder_DW.Memory_PreviousInput =
+      Alinear_encoder_cal->EdgeDetector_ic;
+
+    /* InitializeConditions for Delay: '<S1>/Delay1' */
+    Alinear_encoder_DW.Delay1_DSTATE =
+      Alinear_encoder_cal->Delay1_InitialCondition;
+
+    /* InitializeConditions for Delay: '<S1>/Delay2' */
+    for (i = 0; i < 200; i++) {
+      Alinear_encoder_DW.Delay2_DSTATE[i] =
+        Alinear_encoder_cal->Delay2_InitialCondition;
+    }
+
+    /* End of InitializeConditions for Delay: '<S1>/Delay2' */
+
+    /* SystemInitialize for Enabled SubSystem: '<S4>/POSITIVE Edge' */
+    /* SystemInitialize for RelationalOperator: '<S7>/Relational Operator1' incorporates:
+     *  Outport: '<S7>/OUT'
+     */
+    Alinear_encoder_B.RelationalOperator1 = Alinear_encoder_cal->OUT_Y0_c;
+
+    /* End of SystemInitialize for SubSystem: '<S4>/POSITIVE Edge' */
+
+    /* SystemInitialize for Enabled SubSystem: '<S4>/NEGATIVE Edge' */
+    /* SystemInitialize for RelationalOperator: '<S6>/Relational Operator1' incorporates:
+     *  Outport: '<S6>/OUT'
+     */
+    Alinear_encoder_B.RelationalOperator1_d = Alinear_encoder_cal->OUT_Y0;
+
+    /* End of SystemInitialize for SubSystem: '<S4>/NEGATIVE Edge' */
+
+    /* SystemInitialize for Triggered SubSystem: '<S5>/Triggered Subsystem' */
+    /* SystemInitialize for SignalConversion generated from: '<S8>/In1' incorporates:
+     *  Outport: '<S8>/Out1'
+     */
+    Alinear_encoder_B.In1 = Alinear_encoder_cal->Out1_Y0;
+
+    /* End of SystemInitialize for SubSystem: '<S5>/Triggered Subsystem' */
+
+    /* SystemInitialize for Triggered SubSystem: '<Root>/Sample and Hold' */
+    /* SystemInitialize for SignalConversion generated from: '<S2>/In' incorporates:
+     *  Outport: '<S2>/ '
+     */
+    Alinear_encoder_B.In = Alinear_encoder_cal->_Y0;
+
+    /* End of SystemInitialize for SubSystem: '<Root>/Sample and Hold' */
+  }
+}
+
+/* Model terminate function */
+void Alinear_encoder_terminate(void)
+{
+  /* Terminate for S-Function (sg_fpga_di_sf_a2): '<Root>/Encoder1' */
+  /* Level2 S-Function Block: '<Root>/Encoder1' (sg_fpga_di_sf_a2) */
+  {
+    SimStruct *rts = Alinear_encoder_M->childSfunctions[0];
+    sfcnTerminate(rts);
+  }
+
+  /* user code (Terminate function Trailer) */
+  {
+    freeFPGAModuleSgLib((uint32_t)1);
+  }
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder.h

@@ -0,0 +1,381 @@
+/*
+ * Alinear_encoder.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef Alinear_encoder_h_
+#define Alinear_encoder_h_
+#include "rtwtypes.h"
+#include "simstruc.h"
+#include "fixedpoint.h"
+#include "sg_fpga_io30x_setup_util.h"
+#include "sg_fpga_io31x_io32x_setup_util.h"
+#include "sg_fpga_io33x_setup_util.h"
+#include "sg_fpga_io36x_setup_util.h"
+#include "sg_fpga_io39x_setup_util.h"
+#include "sg_fpga_io3xx_scatter_gather_dma.h"
+#include "sg_fpga_nigora_setup_util.h"
+#include "sg_common.h"
+#include "sg_printf.h"
+#include "Alinear_encoder_types.h"
+#include <stddef.h>
+#include "rt_zcfcn.h"
+#include <cstring>
+#include "Alinear_encoder_cal.h"
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#include "zero_crossing_types.h"
+
+/* Macros for accessing real-time model data structure */
+#ifndef rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag
+#define rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm) ((rtm)->CTOutputIncnstWithState)
+#endif
+
+#ifndef rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag
+#define rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm, val) ((rtm)->CTOutputIncnstWithState = (val))
+#endif
+
+#ifndef rtmGetDerivCacheNeedsReset
+#define rtmGetDerivCacheNeedsReset(rtm) ((rtm)->derivCacheNeedsReset)
+#endif
+
+#ifndef rtmSetDerivCacheNeedsReset
+#define rtmSetDerivCacheNeedsReset(rtm, val) ((rtm)->derivCacheNeedsReset = (val))
+#endif
+
+#ifndef rtmGetFinalTime
+#define rtmGetFinalTime(rtm)           ((rtm)->Timing.tFinal)
+#endif
+
+#ifndef rtmGetSampleHitArray
+#define rtmGetSampleHitArray(rtm)      ((rtm)->Timing.sampleHitArray)
+#endif
+
+#ifndef rtmGetStepSize
+#define rtmGetStepSize(rtm)            ((rtm)->Timing.stepSize)
+#endif
+
+#ifndef rtmGetZCCacheNeedsReset
+#define rtmGetZCCacheNeedsReset(rtm)   ((rtm)->zCCacheNeedsReset)
+#endif
+
+#ifndef rtmSetZCCacheNeedsReset
+#define rtmSetZCCacheNeedsReset(rtm, val) ((rtm)->zCCacheNeedsReset = (val))
+#endif
+
+#ifndef rtmGet_TimeOfLastOutput
+#define rtmGet_TimeOfLastOutput(rtm)   ((rtm)->Timing.timeOfLastOutput)
+#endif
+
+#ifndef rtmGetErrorStatus
+#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
+#endif
+
+#ifndef rtmSetErrorStatus
+#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
+#endif
+
+#ifndef rtmGetStopRequested
+#define rtmGetStopRequested(rtm)       ((rtm)->Timing.stopRequestedFlag)
+#endif
+
+#ifndef rtmSetStopRequested
+#define rtmSetStopRequested(rtm, val)  ((rtm)->Timing.stopRequestedFlag = (val))
+#endif
+
+#ifndef rtmGetStopRequestedPtr
+#define rtmGetStopRequestedPtr(rtm)    (&((rtm)->Timing.stopRequestedFlag))
+#endif
+
+#ifndef rtmGetT
+#define rtmGetT(rtm)                   (rtmGetTPtr((rtm))[0])
+#endif
+
+#ifndef rtmGetTFinal
+#define rtmGetTFinal(rtm)              ((rtm)->Timing.tFinal)
+#endif
+
+#ifndef rtmGetTPtr
+#define rtmGetTPtr(rtm)                ((rtm)->Timing.t)
+#endif
+
+#ifndef rtmGetTStart
+#define rtmGetTStart(rtm)              ((rtm)->Timing.tStart)
+#endif
+
+#ifndef rtmGetTimeOfLastOutput
+#define rtmGetTimeOfLastOutput(rtm)    ((rtm)->Timing.timeOfLastOutput)
+#endif
+
+/* Block signals (default storage) */
+struct B_Alinear_encoder_T {
+  real_T Constant1;                    /* '<Root>/Constant1' */
+  real_T Encoder1_o1;                  /* '<Root>/Encoder1' */
+  real_T Encoder1_o2;                  /* '<Root>/Encoder1' */
+  real_T Encoder1_o3;                  /* '<Root>/Encoder1' */
+  real_T MultiportSwitch[2];           /* '<S4>/Multiport Switch' */
+  real_T DataTypeConversion;           /* '<S1>/Data Type Conversion' */
+  real_T Delay1;                       /* '<S1>/Delay1' */
+  real_T Switch2;                      /* '<S1>/Switch2' */
+  real_T CTEEncoder;                   /* '<S1>/CTE Encoder' */
+  real_T Sum2;                         /* '<S1>/Sum2' */
+  real_T Delay2;                       /* '<S1>/Delay2' */
+  real_T Clock;                        /* '<S5>/Clock' */
+  real_T Sum;                          /* '<S5>/Sum' */
+  real_T Sum1;                         /* '<S1>/Sum1' */
+  real_T GainVelocidad;                /* '<S1>/Gain Velocidad' */
+  real_T In;                           /* '<S2>/In' */
+  real_T Switch;                       /* '<S1>/Switch' */
+  real_T Sum_l;                        /* '<S1>/Sum' */
+  real_T Gain1;                        /* '<S1>/Gain1' */
+  real_T In1;                          /* '<S8>/In1' */
+  boolean_T DataTypeConversion2;       /* '<S4>/Data Type Conversion2' */
+  boolean_T Memory;                    /* '<S4>/Memory' */
+  boolean_T LogicalOperator1;          /* '<S4>/Logical Operator1' */
+  boolean_T RelationalOperator;        /* '<S5>/Relational Operator' */
+  boolean_T LogicalOperator;           /* '<S1>/Logical Operator' */
+  boolean_T RelationalOperator1;       /* '<S7>/Relational Operator1' */
+  boolean_T RelationalOperator1_d;     /* '<S6>/Relational Operator1' */
+};
+
+/* Block states (default storage) for system '<Root>' */
+struct DW_Alinear_encoder_T {
+  real_T Delay1_DSTATE;                /* '<S1>/Delay1' */
+  real_T Delay2_DSTATE[200];           /* '<S1>/Delay2' */
+  void *Encoder1_PWORK[2];             /* '<Root>/Encoder1' */
+  struct {
+    void *LoggedData[2];
+  } Scope_PWORK;                       /* '<Root>/Scope' */
+
+  struct {
+    void *USERIO_P_IND;
+    void *PROG_SPACE_P_IND;
+    void *CONFIG_REGISTER_P_IND;
+    void *CONDITIONING_MODULE_IO3xx_2x_P_IND;
+    void *DEVICENAME_P_IND;
+    void *DMA_CONTROLLER_P_IND;
+  } Setup_PWORK;                       /* '<Root>/Setup' */
+
+  struct {
+    int_T MODULEARCHITECTURE_I_IND;
+  } Setup_IWORK;                       /* '<Root>/Setup' */
+
+  int8_T SampleandHold_SubsysRanBC;    /* '<Root>/Sample and Hold' */
+  int8_T POSITIVEEdge_SubsysRanBC;     /* '<S4>/POSITIVE Edge' */
+  int8_T NEGATIVEEdge_SubsysRanBC;     /* '<S4>/NEGATIVE Edge' */
+  int8_T TriggeredSubsystem_SubsysRanBC;/* '<S5>/Triggered Subsystem' */
+  boolean_T Memory_PreviousInput;      /* '<S4>/Memory' */
+  boolean_T POSITIVEEdge_MODE;         /* '<S4>/POSITIVE Edge' */
+  boolean_T NEGATIVEEdge_MODE;         /* '<S4>/NEGATIVE Edge' */
+};
+
+/* Zero-crossing (trigger) state */
+struct PrevZCX_Alinear_encoder_T {
+  ZCSigState SampleandHold_Trig_ZCE;   /* '<Root>/Sample and Hold' */
+  ZCSigState TriggeredSubsystem_Trig_ZCE;/* '<S5>/Triggered Subsystem' */
+};
+
+/* Real-time Model Data Structure */
+struct tag_RTM_Alinear_encoder_T {
+  struct SimStruct_tag * *childSfunctions;
+  const char_T *errorStatus;
+  SS_SimMode simMode;
+  RTWSolverInfo solverInfo;
+  RTWSolverInfo *solverInfoPtr;
+  void *sfcnInfo;
+
+  /*
+   * NonInlinedSFcns:
+   * The following substructure contains information regarding
+   * non-inlined s-functions used in the model.
+   */
+  struct {
+    RTWSfcnInfo sfcnInfo;
+    time_T *taskTimePtrs[2];
+    SimStruct childSFunctions[1];
+    SimStruct *childSFunctionPtrs[1];
+    struct _ssBlkInfo2 blkInfo2[1];
+    struct _ssSFcnModelMethods2 methods2[1];
+    struct _ssSFcnModelMethods3 methods3[1];
+    struct _ssSFcnModelMethods4 methods4[1];
+    struct _ssStatesInfo2 statesInfo2[1];
+    ssPeriodicStatesInfo periodicStatesInfo[1];
+    struct _ssPortInfo2 inputOutputPortInfo2[1];
+    struct {
+      time_T sfcnPeriod[1];
+      time_T sfcnOffset[1];
+      int_T sfcnTsMap[1];
+      struct _ssPortOutputs outputPortInfo[3];
+      struct _ssOutPortUnit outputPortUnits[3];
+      struct _ssOutPortCoSimAttribute outputPortCoSimAttribute[3];
+      uint_T attribs[4];
+      mxArray *params[4];
+      struct _ssDWorkRecord dWork[1];
+      struct _ssDWorkAuxRecord dWorkAux[1];
+    } Sfcn0;
+  } NonInlinedSFcns;
+
+  boolean_T zCCacheNeedsReset;
+  boolean_T derivCacheNeedsReset;
+  boolean_T CTOutputIncnstWithState;
+
+  /*
+   * Sizes:
+   * The following substructure contains sizes information
+   * for many of the model attributes such as inputs, outputs,
+   * dwork, sample times, etc.
+   */
+  struct {
+    uint32_T options;
+    int_T numContStates;
+    int_T numU;
+    int_T numY;
+    int_T numSampTimes;
+    int_T numBlocks;
+    int_T numBlockIO;
+    int_T numBlockPrms;
+    int_T numDwork;
+    int_T numSFcnPrms;
+    int_T numSFcns;
+    int_T numIports;
+    int_T numOports;
+    int_T numNonSampZCs;
+    int_T sysDirFeedThru;
+    int_T rtwGenSfcn;
+  } Sizes;
+
+  /*
+   * Timing:
+   * The following substructure contains information regarding
+   * the timing information for the model.
+   */
+  struct {
+    time_T stepSize;
+    uint32_T clockTick0;
+    uint32_T clockTickH0;
+    time_T stepSize0;
+    uint32_T clockTick1;
+    uint32_T clockTickH1;
+    time_T stepSize1;
+    time_T tStart;
+    time_T tFinal;
+    time_T timeOfLastOutput;
+    SimTimeStep simTimeStep;
+    boolean_T stopRequestedFlag;
+    time_T *sampleTimes;
+    time_T *offsetTimes;
+    int_T *sampleTimeTaskIDPtr;
+    int_T *sampleHits;
+    int_T *perTaskSampleHits;
+    time_T *t;
+    time_T sampleTimesArray[2];
+    time_T offsetTimesArray[2];
+    int_T sampleTimeTaskIDArray[2];
+    int_T sampleHitArray[2];
+    int_T perTaskSampleHitsArray[4];
+    time_T tArray[2];
+  } Timing;
+};
+
+/* Block signals (default storage) */
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern struct B_Alinear_encoder_T Alinear_encoder_B;
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/* Block states (default storage) */
+extern struct DW_Alinear_encoder_T Alinear_encoder_DW;
+
+/* Zero-crossing (trigger) state */
+extern PrevZCX_Alinear_encoder_T Alinear_encoder_PrevZCX;
+
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  /* Model entry point functions */
+  extern void Alinear_encoder_initialize(void);
+  extern void Alinear_encoder_step(void);
+  extern void Alinear_encoder_terminate(void);
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/* Real-time Model object */
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern RT_MODEL_Alinear_encoder_T *const Alinear_encoder_M;
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Use the MATLAB hilite_system command to trace the generated code back
+ * to the model.  For example,
+ *
+ * hilite_system('<S3>')    - opens system 3
+ * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'Alinear_encoder'
+ * '<S1>'   : 'Alinear_encoder/Decodificador'
+ * '<S2>'   : 'Alinear_encoder/Sample and Hold'
+ * '<S3>'   : 'Alinear_encoder/Decodificador/Edge Detector'
+ * '<S4>'   : 'Alinear_encoder/Decodificador/Edge Detector/Model'
+ * '<S5>'   : 'Alinear_encoder/Decodificador/Edge Detector/Model/Internal dirac generator'
+ * '<S6>'   : 'Alinear_encoder/Decodificador/Edge Detector/Model/NEGATIVE Edge'
+ * '<S7>'   : 'Alinear_encoder/Decodificador/Edge Detector/Model/POSITIVE Edge'
+ * '<S8>'   : 'Alinear_encoder/Decodificador/Edge Detector/Model/Internal dirac generator/Triggered Subsystem'
+ */
+#endif                                 /* Alinear_encoder_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder_cal.cpp

@@ -0,0 +1,127 @@
+#include "Alinear_encoder_cal.h"
+#include "Alinear_encoder.h"
+
+/* Storage class 'PageSwitching' */
+Alinear_encoder_cal_type Alinear_encoder_cal_impl = {
+  /* Mask Parameter: EdgeDetector_model
+   * Referenced by: '<S4>/Constant1'
+   */
+  2.0,
+
+  /* Mask Parameter: EdgeDetector_ic
+   * Referenced by: '<S4>/Memory'
+   */
+  false,
+
+  /* Expression: -1e6
+   * Referenced by: '<S8>/Out1'
+   */
+  -1.0E+6,
+
+  /* Expression: [1 0]
+   * Referenced by: '<S4>/pos. edge'
+   */
+  { 1.0, 0.0 },
+
+  /* Expression: [0 1]
+   * Referenced by: '<S4>/neg. edge'
+   */
+  { 0.0, 1.0 },
+
+  /* Expression: [1 1]
+   * Referenced by: '<S4>/either edge'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: -1
+   * Referenced by: '<S1>/Gain1'
+   */
+  -1.0,
+
+  /* Expression: initCond
+   * Referenced by: '<S2>/ '
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant1'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Constant'
+   */
+  0.0,
+
+  /* Computed Parameter: Encoder1_P1_Size
+   * Referenced by: '<Root>/Encoder1'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: id
+   * Referenced by: '<Root>/Encoder1'
+   */
+  1.0,
+
+  /* Computed Parameter: Encoder1_P2_Size
+   * Referenced by: '<Root>/Encoder1'
+   */
+  { 1.0, 3.0 },
+
+  /* Expression: chan
+   * Referenced by: '<Root>/Encoder1'
+   */
+  { 8.0, 9.0, 10.0 },
+
+  /* Computed Parameter: Encoder1_P3_Size
+   * Referenced by: '<Root>/Encoder1'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: vectorizeOutput
+   * Referenced by: '<Root>/Encoder1'
+   */
+  0.0,
+
+  /* Computed Parameter: Encoder1_P4_Size
+   * Referenced by: '<Root>/Encoder1'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: ts
+   * Referenced by: '<Root>/Encoder1'
+   */
+  4.0E-5,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay1'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Switch2'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay2'
+   */
+  0.0,
+
+  /* Expression: eps
+   * Referenced by: '<S5>/Constant'
+   */
+  2.2204460492503131E-16,
+
+  /* Computed Parameter: OUT_Y0
+   * Referenced by: '<S6>/OUT'
+   */
+  false,
+
+  /* Computed Parameter: OUT_Y0_c
+   * Referenced by: '<S7>/OUT'
+   */
+  false
+};
+
+Alinear_encoder_cal_type *Alinear_encoder_cal = &Alinear_encoder_cal_impl;

Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder_cal.h

@@ -0,0 +1,85 @@
+#ifndef Alinear_encoder_cal_h_
+#define Alinear_encoder_cal_h_
+#include "rtwtypes.h"
+
+/* Storage class 'PageSwitching', for system '<Root>' */
+struct Alinear_encoder_cal_type {
+  real_T EdgeDetector_model;           /* Mask Parameter: EdgeDetector_model
+                                        * Referenced by: '<S4>/Constant1'
+                                        */
+  boolean_T EdgeDetector_ic;           /* Mask Parameter: EdgeDetector_ic
+                                        * Referenced by: '<S4>/Memory'
+                                        */
+  real_T Out1_Y0;                      /* Expression: -1e6
+                                        * Referenced by: '<S8>/Out1'
+                                        */
+  real_T posedge_Value[2];             /* Expression: [1 0]
+                                        * Referenced by: '<S4>/pos. edge'
+                                        */
+  real_T negedge_Value[2];             /* Expression: [0 1]
+                                        * Referenced by: '<S4>/neg. edge'
+                                        */
+  real_T eitheredge_Value[2];          /* Expression: [1 1]
+                                        * Referenced by: '<S4>/either edge'
+                                        */
+  real_T Gain1_Gain;                   /* Expression: -1
+                                        * Referenced by: '<S1>/Gain1'
+                                        */
+  real_T _Y0;                          /* Expression: initCond
+                                        * Referenced by: '<S2>/ '
+                                        */
+  real_T Constant1_Value;              /* Expression: 0
+                                        * Referenced by: '<Root>/Constant1'
+                                        */
+  real_T Constant_Value;               /* Expression: 0
+                                        * Referenced by: '<S1>/Constant'
+                                        */
+  real_T Encoder1_P1_Size[2];          /* Computed Parameter: Encoder1_P1_Size
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P1;                  /* Expression: id
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P2_Size[2];          /* Computed Parameter: Encoder1_P2_Size
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P2[3];               /* Expression: chan
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P3_Size[2];          /* Computed Parameter: Encoder1_P3_Size
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P3;                  /* Expression: vectorizeOutput
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P4_Size[2];          /* Computed Parameter: Encoder1_P4_Size
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Encoder1_P4;                  /* Expression: ts
+                                        * Referenced by: '<Root>/Encoder1'
+                                        */
+  real_T Delay1_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay1'
+                                        */
+  real_T Switch2_Threshold;            /* Expression: 0
+                                        * Referenced by: '<S1>/Switch2'
+                                        */
+  real_T Delay2_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay2'
+                                        */
+  real_T Constant_Value_p;             /* Expression: eps
+                                        * Referenced by: '<S5>/Constant'
+                                        */
+  boolean_T OUT_Y0;                    /* Computed Parameter: OUT_Y0
+                                        * Referenced by: '<S6>/OUT'
+                                        */
+  boolean_T OUT_Y0_c;                  /* Computed Parameter: OUT_Y0_c
+                                        * Referenced by: '<S7>/OUT'
+                                        */
+};
+
+/* Storage class 'PageSwitching' */
+extern Alinear_encoder_cal_type Alinear_encoder_cal_impl;
+extern Alinear_encoder_cal_type *Alinear_encoder_cal;
+
+#endif                                 /* Alinear_encoder_cal_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder_private.h

@@ -0,0 +1,48 @@
+/*
+ * Alinear_encoder_private.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef Alinear_encoder_private_h_
+#define Alinear_encoder_private_h_
+#include "rtwtypes.h"
+#include "multiword_types.h"
+#include "zero_crossing_types.h"
+#include "Alinear_encoder_types.h"
+#include "Alinear_encoder.h"
+
+/* Private macros used by the generated code to access rtModel */
+#ifndef rtmIsMajorTimeStep
+#define rtmIsMajorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MAJOR_TIME_STEP)
+#endif
+
+#ifndef rtmIsMinorTimeStep
+#define rtmIsMinorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MINOR_TIME_STEP)
+#endif
+
+#ifndef rtmSetTFinal
+#define rtmSetTFinal(rtm, val)         ((rtm)->Timing.tFinal = (val))
+#endif
+
+#ifndef rtmSetTPtr
+#define rtmSetTPtr(rtm, val)           ((rtm)->Timing.t = (val))
+#endif
+
+extern "C" void sg_fpga_di_sf_a2(SimStruct *rts);
+
+#endif                                 /* Alinear_encoder_private_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/Alinear_encoder_types.h

@@ -0,0 +1,27 @@
+/*
+ * Alinear_encoder_types.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef Alinear_encoder_types_h_
+#define Alinear_encoder_types_h_
+
+/* Forward declaration for rtModel */
+typedef struct tag_RTM_Alinear_encoder_T RT_MODEL_Alinear_encoder_T;
+
+#endif                                 /* Alinear_encoder_types_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/Options.hpp

@@ -0,0 +1,13 @@
+#ifndef __OPTIONS_H___
+#define __OPTIONS_H___
+
+#include "simstruc_types.h"
+#ifndef MT
+#define MT 0                    /* MT may be undefined by simstruc_types.h */
+#endif
+
+#include "Alinear_encoder.h"
+
+#define FULLMULTITHREAD	1
+
+#endif // __OPTIONS_H___

Control_Vectorial/real/Alinear_encoder_sg_rtw/instrumented/Alinear_encoder.bat

@@ -0,0 +1,15 @@
+
+call "%SLREALTIME_QNX_SP_ROOT%\%SLREALTIME_QNX_VERSION%\qnxsdp-env.bat"
+
+cd .
+
+chcp 1252
+
+if "%1"=="" (make  -f Alinear_encoder.mk all) else (make  -f Alinear_encoder.mk %1)
+@if errorlevel 1 goto error_exit
+
+exit /B 0
+
+:error_exit
+echo The make command returned an error of %errorlevel%
+exit /B 1

Control_Vectorial/real/Alinear_encoder_sg_rtw/instrumented/Alinear_encoder.mk

@@ -0,0 +1,507 @@
+###########################################################################
+## Makefile generated for component 'Alinear_encoder'. 
+## 
+## Makefile     : Alinear_encoder.mk
+## Generated on : Fri Aug 22 11:49:42 2025
+## Final product: $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder
+## Product type : executable
+## 
+###########################################################################
+
+###########################################################################
+## MACROS
+###########################################################################
+
+# Macro Descriptions:
+# PRODUCT_NAME            Name of the system to build
+# MAKEFILE                Name of this makefile
+
+PRODUCT_NAME              = Alinear_encoder
+MAKEFILE                  = Alinear_encoder.mk
+MATLAB_ROOT               = C:/PROGRA~1/MATLAB/R2024b
+MATLAB_BIN                = C:/PROGRA~1/MATLAB/R2024b/bin
+MATLAB_ARCH_BIN           = $(MATLAB_BIN)/win64
+START_DIR                 = C:/Users/OSUESC~1/Desktop/ALUMNO~1/control/CONTRO~1/real
+SOLVER                    = 
+SOLVER_OBJ                = 
+CLASSIC_INTERFACE         = 0
+TGT_FCN_LIB               = ISO_C++
+MODEL_HAS_DYNAMICALLY_LOADED_SFCNS = 0
+RELATIVE_PATH_TO_ANCHOR   = ../..
+C_STANDARD_OPTS           = 
+CPP_STANDARD_OPTS         = 
+
+###########################################################################
+## TOOLCHAIN SPECIFICATIONS
+###########################################################################
+
+# Toolchain Name:          Simulink Real-Time Toolchain
+# Supported Version(s):    
+# ToolchainInfo Version:   2024b
+# Specification Revision:  1.0
+# 
+#-------------------------------------------
+# Macros assumed to be defined elsewhere
+#-------------------------------------------
+
+# SLREALTIME_QNX_SP_ROOT
+# SLREALTIME_QNX_VERSION
+
+#-----------
+# MACROS
+#-----------
+
+QCC_TARGET             = gcc_ntox86_64
+
+TOOLCHAIN_SRCS = 
+TOOLCHAIN_INCS = 
+TOOLCHAIN_LIBS = -L$(MATLAB_ROOT)/toolbox/slrealtime/target/win64/target/lib -ltraceparser -lpps -lslrealtime_kernel -lslrealtime_platform -lslrealtime_rtps -lsocket -lboost_system -lboost_log -lpci -lopenblas -lpcap
+
+#------------------------
+# BUILD TOOL COMMANDS
+#------------------------
+
+# C Compiler: QNX C Compiler
+CC = qcc
+
+# Linker: QCC Linker
+LD = q++
+
+# C++ Compiler: QNX C++ Compiler
+CPP = q++
+
+# C++ Linker: QCC C++ Linker
+CPP_LD = q++
+
+# Archiver: QNX Archiver
+AR = ntox86_64-gcc-ar
+
+# Builder: GMAKE Utility
+MAKE = make
+
+
+#-------------------------
+# Directives/Utilities
+#-------------------------
+
+CDEBUG              = -g -O0 -finstrument-functions
+C_OUTPUT_FLAG       = -o
+LDDEBUG             = -g
+OUTPUT_FLAG         = -o
+CPPDEBUG            = -g -O0 -finstrument-functions
+CPP_OUTPUT_FLAG     = -o
+CPPLDDEBUG          = -g
+OUTPUT_FLAG         = -o
+ARDEBUG             =
+STATICLIB_OUTPUT_FLAG =
+RM                  = @del /F
+ECHO                = @echo
+MV                  = @move
+RUN                 =
+
+#--------------------------------------
+# "Faster Runs" Build Configuration
+#--------------------------------------
+
+ARFLAGS              = ruvs
+CFLAGS               = -c -V$(QCC_TARGET) -g \
+                       -O2 -fwrapv
+CPPFLAGS             = -c -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++ \
+                       -O2 -fwrapv
+CPP_LDFLAGS          = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
+CPP_SHAREDLIB_LDFLAGS  = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
+LDFLAGS              = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
+MAKE_FLAGS           = -f $(MAKEFILE)
+SHAREDLIB_LDFLAGS    = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
+
+
+
+###########################################################################
+## OUTPUT INFO
+###########################################################################
+
+PRODUCT = $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder
+PRODUCT_TYPE = "executable"
+BUILD_TYPE = "Top-Level Standalone Executable"
+
+###########################################################################
+## INCLUDE PATHS
+###########################################################################
+
+INCLUDES_BUILDINFO = -I$(START_DIR) -I$(START_DIR)/Alinear_encoder_sg_rtw -I$(MATLAB_ROOT)/toolbox/slrealtime/simulink/blocks/dist/include -I$(MATLAB_ROOT)/toolbox/slrealtime/target/kernel/dist/include -I$(MATLAB_ROOT)/extern/include -I$(MATLAB_ROOT)/simulink/include -I$(MATLAB_ROOT)/rtw/c/src -I$(MATLAB_ROOT)/rtw/c/src/ext_mode/common -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1 -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/include -I$(START_DIR)/Alinear_encoder_sg_rtw/instrumented
+
+INCLUDES = $(INCLUDES_BUILDINFO)
+
+###########################################################################
+## DEFINES
+###########################################################################
+
+DEFINES_ = -DSIMULINK_REAL_TIME -D_QNX_SOURCE
+DEFINES_BUILD_ARGS = -DCLASSIC_INTERFACE=0 -DALLOCATIONFCN=0 -DEXT_MODE=1 -DMAT_FILE=0 -DONESTEPFCN=1 -DTERMFCN=1 -DMULTI_INSTANCE_CODE=0 -DINTEGER_CODE=0 -DMT=0
+DEFINES_CUSTOM = 
+DEFINES_OPTS = -DTID01EQ=1
+DEFINES_STANDARD = -DMODEL=Alinear_encoder -DNUMST=2 -DNCSTATES=0 -DHAVESTDIO -DRT -DUSE_RTMODEL
+
+DEFINES = $(DEFINES_) $(DEFINES_BUILD_ARGS) $(DEFINES_CUSTOM) $(DEFINES_OPTS) $(DEFINES_STANDARD)
+
+###########################################################################
+## SOURCE FILES
+###########################################################################
+
+SRCS = $(MATLAB_ROOT)/rtw/c/src/rt_matrx.c $(MATLAB_ROOT)/rtw/c/src/rt_printf.c $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder.cpp $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder_cal.cpp $(START_DIR)/Alinear_encoder_sg_rtw/rtGetInf.cpp $(START_DIR)/Alinear_encoder_sg_rtw/rtGetNaN.cpp $(START_DIR)/Alinear_encoder_sg_rtw/rt_nonfinite.cpp $(START_DIR)/Alinear_encoder_sg_rtw/rt_zcfcn.cpp $(START_DIR)/Alinear_encoder_sg_rtw/slrealtime_datatype_ground.cpp $(START_DIR)/Alinear_encoder_sg_rtw/rte_Alinear_encoder_parameters.cpp $(START_DIR)/Alinear_encoder_sg_rtw/main.cpp C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_di_sf_a2.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io30x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_scatter_gather_dma.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io39x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io31x_io32x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io33x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io36x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_util.c $(START_DIR)/Alinear_encoder_sg_rtw/sg_early_init.cpp host_timer_x86.c slrealtime_code_profiling_utility_functions.cpp
+
+ALL_SRCS = $(SRCS)
+
+###########################################################################
+## OBJECTS
+###########################################################################
+
+OBJS = rt_matrx.o rt_printf.o Alinear_encoder.o Alinear_encoder_cal.o rtGetInf.o rtGetNaN.o rt_nonfinite.o rt_zcfcn.o slrealtime_datatype_ground.o rte_Alinear_encoder_parameters.o main.o sg_fpga_di_sf_a2.o sg_fpga_io30x_setup_util.o sg_fpga_io3xx_scatter_gather_dma.o sg_fpga_io39x_setup_util.o sg_fpga_io31x_io32x_setup_util.o sg_fpga_io33x_setup_util.o sg_fpga_setup_util.o sg_fpga_io36x_setup_util.o sg_fpga_io3xx_util.o sg_early_init.o host_timer_x86.o slrealtime_code_profiling_utility_functions.o
+
+ALL_OBJS = $(OBJS)
+
+###########################################################################
+## PREBUILT OBJECT FILES
+###########################################################################
+
+PREBUILT_OBJS = 
+
+###########################################################################
+## LIBRARIES
+###########################################################################
+
+LIBS = 
+
+###########################################################################
+## SYSTEM LIBRARIES
+###########################################################################
+
+SYSTEM_LIBS = 
+
+###########################################################################
+## ADDITIONAL TOOLCHAIN FLAGS
+###########################################################################
+
+#---------------
+# C Compiler
+#---------------
+
+CFLAGS_BASIC = $(DEFINES) $(INCLUDES)
+
+CFLAGS += $(CFLAGS_BASIC)
+
+#-----------------
+# C++ Compiler
+#-----------------
+
+CPPFLAGS_BASIC = $(DEFINES) $(INCLUDES)
+
+CPPFLAGS += $(CPPFLAGS_BASIC)
+
+#---------------
+# C++ Linker
+#---------------
+
+CPP_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+CPP_LDFLAGS += $(CPP_LDFLAGS_)
+
+#------------------------------
+# C++ Shared Library Linker
+#------------------------------
+
+CPP_SHAREDLIB_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+CPP_SHAREDLIB_LDFLAGS += $(CPP_SHAREDLIB_LDFLAGS_)
+
+#-----------
+# Linker
+#-----------
+
+LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+LDFLAGS += $(LDFLAGS_)
+
+#--------------------------
+# Shared Library Linker
+#--------------------------
+
+SHAREDLIB_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+SHAREDLIB_LDFLAGS += $(SHAREDLIB_LDFLAGS_)
+
+###########################################################################
+## INLINED COMMANDS
+###########################################################################
+
+###########################################################################
+## PHONY TARGETS
+###########################################################################
+
+.PHONY : all build buildobj clean info prebuild
+
+
+all : build
+	@echo "### Successfully generated all binary outputs."
+
+
+build : prebuild $(PRODUCT)
+
+
+buildobj : prebuild $(OBJS) $(PREBUILT_OBJS)
+	@echo "### Successfully generated all binary outputs."
+
+
+prebuild : 
+
+
+###########################################################################
+## FINAL TARGET
+###########################################################################
+
+#-------------------------------------------
+# Create a standalone executable            
+#-------------------------------------------
+
+$(PRODUCT) : $(OBJS) $(PREBUILT_OBJS)
+	@echo "### Creating standalone executable "$(PRODUCT)" ..."
+	$(CPP_LD) $(CPP_LDFLAGS) -o $(PRODUCT) $(OBJS) $(SYSTEM_LIBS) $(TOOLCHAIN_LIBS)
+	@echo "### Created: $(PRODUCT)"
+
+
+###########################################################################
+## INTERMEDIATE TARGETS
+###########################################################################
+
+#---------------------
+# SOURCE-TO-OBJECT
+#---------------------
+
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/Alinear_encoder_sg_rtw/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/Alinear_encoder_sg_rtw/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/simulink/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/simulink/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/simulink/blocks/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/simulink/blocks/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : ../%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : ../%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/coder/profile/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/coder/profile/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/Alinear_encoder_sg_rtw/instrumented/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/Alinear_encoder_sg_rtw/instrumented/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rt_matrx.o : $(MATLAB_ROOT)/rtw/c/src/rt_matrx.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+rt_printf.o : $(MATLAB_ROOT)/rtw/c/src/rt_printf.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+Alinear_encoder.o : $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+Alinear_encoder_cal.o : $(START_DIR)/Alinear_encoder_sg_rtw/Alinear_encoder_cal.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rtGetInf.o : $(START_DIR)/Alinear_encoder_sg_rtw/rtGetInf.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rtGetNaN.o : $(START_DIR)/Alinear_encoder_sg_rtw/rtGetNaN.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rt_nonfinite.o : $(START_DIR)/Alinear_encoder_sg_rtw/rt_nonfinite.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rt_zcfcn.o : $(START_DIR)/Alinear_encoder_sg_rtw/rt_zcfcn.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+slrealtime_datatype_ground.o : $(START_DIR)/Alinear_encoder_sg_rtw/slrealtime_datatype_ground.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rte_Alinear_encoder_parameters.o : $(START_DIR)/Alinear_encoder_sg_rtw/rte_Alinear_encoder_parameters.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+main.o : $(START_DIR)/Alinear_encoder_sg_rtw/main.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+sg_fpga_di_sf_a2.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_di_sf_a2.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io30x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io30x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io3xx_scatter_gather_dma.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_scatter_gather_dma.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io39x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io39x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io31x_io32x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io31x_io32x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io33x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io33x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io36x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io36x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io3xx_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_early_init.o : $(START_DIR)/Alinear_encoder_sg_rtw/sg_early_init.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+###########################################################################
+## DEPENDENCIES
+###########################################################################
+
+$(ALL_OBJS) : rtw_proj.tmw $(MAKEFILE)
+
+
+###########################################################################
+## MISCELLANEOUS TARGETS
+###########################################################################
+
+info : 
+	@echo "### PRODUCT = $(PRODUCT)"
+	@echo "### PRODUCT_TYPE = $(PRODUCT_TYPE)"
+	@echo "### BUILD_TYPE = $(BUILD_TYPE)"
+	@echo "### INCLUDES = $(INCLUDES)"
+	@echo "### DEFINES = $(DEFINES)"
+	@echo "### ALL_SRCS = $(ALL_SRCS)"
+	@echo "### ALL_OBJS = $(ALL_OBJS)"
+	@echo "### LIBS = $(LIBS)"
+	@echo "### MODELREF_LIBS = $(MODELREF_LIBS)"
+	@echo "### SYSTEM_LIBS = $(SYSTEM_LIBS)"
+	@echo "### TOOLCHAIN_LIBS = $(TOOLCHAIN_LIBS)"
+	@echo "### CFLAGS = $(CFLAGS)"
+	@echo "### LDFLAGS = $(LDFLAGS)"
+	@echo "### SHAREDLIB_LDFLAGS = $(SHAREDLIB_LDFLAGS)"
+	@echo "### CPPFLAGS = $(CPPFLAGS)"
+	@echo "### CPP_LDFLAGS = $(CPP_LDFLAGS)"
+	@echo "### CPP_SHAREDLIB_LDFLAGS = $(CPP_SHAREDLIB_LDFLAGS)"
+	@echo "### ARFLAGS = $(ARFLAGS)"
+	@echo "### MAKE_FLAGS = $(MAKE_FLAGS)"
+
+
+clean : 
+	$(ECHO) "### Deleting all derived files ..."
+	$(RM) $(subst /,\,$(PRODUCT))
+	$(RM) $(subst /,\,$(ALL_OBJS))
+	$(ECHO) "### Deleted all derived files."
+
+

Control_Vectorial/real/Alinear_encoder_sg_rtw/instrumented/rtw_proj.tmw

@@ -0,0 +1,4 @@
+Simulink Coder project for Alinear_encoder using . MATLAB root = C:\Program Files\MATLAB\R2024b. SimStruct date: 21-jun-2024 21:53:13
+This file is generated by Simulink Coder for use by the make utility
+to determine when to rebuild objects when the name of the current Simulink Coder project changes.
+The rtwinfomat located at: 

Control_Vectorial/real/Alinear_encoder_sg_rtw/instrumented/slrealtime_code_profiling_utility_functions.cpp

@@ -0,0 +1,62 @@
+/*
+ * File: slrealtime_code_profiling_utility_functions.cpp
+ *
+ * Code generated for instrumentation.
+ *
+ */
+
+#include "slrealtime_code_profiling_utility_functions.h"
+
+/* Code instrumentation offset(s) for model  */
+#define taskTimeStart__offset          0
+#define taskTimeEnd__offset            0
+
+/* A function parameter may be intentionally unused */
+#ifndef UNUSED_PARAMETER
+# if defined(__LCC__)
+#   define UNUSED_PARAMETER(x)
+# else
+#   define UNUSED_PARAMETER(x)         (void) (x)
+# endif
+#endif
+
+void xilUploadProfilingData(uint32_T sectionId)
+{
+  slrealtimeAddEvent(sectionId);
+}
+
+/* For real-time, multitasking case this function is stubbed out. */
+#define xilProfilingTimerFreezeInternal() {}
+
+void xilProfilingTimerFreeze(void)
+{
+}
+
+#define xilProfilingTimerUnFreezeInternal() {}
+
+void xilProfilingTimerUnFreeze(void)
+{
+}
+
+/* Tic/Toc methods for task profiling */
+#define taskTimeStart(id)              { \
+ xilUploadProfilingData(id); \
+ xilProfilingTimerUnFreezeInternal(); \
+}
+#define taskTimeEnd(id)                { \
+ uint32_T sectionIdNeg = id; \
+ sectionIdNeg = ~sectionIdNeg; \
+ xilProfilingTimerFreezeInternal(); \
+ xilUploadProfilingData(sectionIdNeg); \
+}
+
+/* Code instrumentation method(s) for model  */
+void taskTimeStart_(uint32_T sectionId)
+{
+  taskTimeStart(taskTimeStart__offset + sectionId);
+}
+
+void taskTimeEnd_(uint32_T sectionId)
+{
+  taskTimeEnd(taskTimeEnd__offset + sectionId);
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/instrumented/slrealtime_code_profiling_utility_functions.h

@@ -0,0 +1,38 @@
+/*
+ * File: slrealtime_code_profiling_utility_functions.h
+ *
+ * Code generated for instrumentation.
+ *
+ */
+
+/* Functions with a C call interface */
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+#include "tracing.h"
+#ifdef __cplusplus
+
+}
+
+#endif
+
+#include "rtwtypes.h"
+
+/* Upload code instrumentation data point */
+void slrealtimeUploadEvent(
+  void* pData, uint32_T numMemUnits, uint32_T sectionId);
+
+/* Uploads data */
+void xilUploadProfilingData(uint32_T sectionId);
+
+/* Pause/restart the timer while running code associated with storing and uploading the data. */
+void xilProfilingTimerFreeze(void);
+void xilProfilingTimerUnFreeze(void);
+
+/* Code instrumentation method(s) for model  */
+void taskTimeStart_(uint32_T sectionId);
+void taskTimeEnd_(uint32_T sectionId);

Control_Vectorial/real/Alinear_encoder_sg_rtw/loggingdb.json

@@ -0,0 +1 @@
+{"model_checksum":[0,0,0,0],"num_entries":0,"channels":[]}

Control_Vectorial/real/Alinear_encoder_sg_rtw/main.cpp

@@ -0,0 +1,39 @@
+/* Main generated for Simulink Real-Time model Alinear_encoder */
+#include <ModelInfo.hpp>
+#include <utilities.hpp>
+#include "Alinear_encoder.h"
+#include "rte_Alinear_encoder_parameters.h"
+
+/* Task wrapper function definitions */
+void Alinear_encoder_Task1(void)
+{ 
+    Alinear_encoder_step();
+} 
+/* Task descriptors */
+slrealtime::TaskInfo task_1( 0u, std::bind(Alinear_encoder_Task1), slrealtime::TaskInfo::PERIODIC, 4e-05, 0, 40);
+
+/* Executable base address for XCP */
+#ifdef __linux__
+extern char __executable_start;
+static uintptr_t const base_address = reinterpret_cast<uintptr_t>(&__executable_start);
+#else
+/* Set 0 as placeholder, to be parsed later from /proc filesystem */
+static uintptr_t const base_address = 0;
+#endif
+
+/* Model descriptor */
+slrealtime::ModelInfo Alinear_encoder_Info =
+{
+    "Alinear_encoder",
+    Alinear_encoder_initialize,
+    Alinear_encoder_terminate,
+    []()->char const*& { return Alinear_encoder_M->errorStatus; },
+    []()->unsigned char& { return Alinear_encoder_M->Timing.stopRequestedFlag; },
+    { task_1 },
+    slrealtime::getSegmentVector()
+};
+
+int main(int argc, char *argv[]) {
+    slrealtime::BaseAddress::set(base_address);
+    return slrealtime::runModel(argc, argv, Alinear_encoder_Info);
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/multiword_types.h

@@ -0,0 +1,597 @@
+/*
+ * multiword_types.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef MULTIWORD_TYPES_H
+#define MULTIWORD_TYPES_H
+#include "rtwtypes.h"
+
+/*
+ * Definitions supporting external data access
+ */
+typedef int64_T chunk_T;
+typedef uint64_T uchunk_T;
+
+/*
+ * MultiWord supporting definitions
+ */
+typedef long long longlong_T;
+
+/*
+ * MultiWord types
+ */
+typedef struct {
+  uint64_T chunks[2];
+} int128m_T;
+
+typedef struct {
+  int128m_T re;
+  int128m_T im;
+} cint128m_T;
+
+typedef struct {
+  uint64_T chunks[2];
+} uint128m_T;
+
+typedef struct {
+  uint128m_T re;
+  uint128m_T im;
+} cuint128m_T;
+
+typedef struct {
+  uint64_T chunks[3];
+} int192m_T;
+
+typedef struct {
+  int192m_T re;
+  int192m_T im;
+} cint192m_T;
+
+typedef struct {
+  uint64_T chunks[3];
+} uint192m_T;
+
+typedef struct {
+  uint192m_T re;
+  uint192m_T im;
+} cuint192m_T;
+
+typedef struct {
+  uint64_T chunks[4];
+} int256m_T;
+
+typedef struct {
+  int256m_T re;
+  int256m_T im;
+} cint256m_T;
+
+typedef struct {
+  uint64_T chunks[4];
+} uint256m_T;
+
+typedef struct {
+  uint256m_T re;
+  uint256m_T im;
+} cuint256m_T;
+
+typedef struct {
+  uint64_T chunks[5];
+} int320m_T;
+
+typedef struct {
+  int320m_T re;
+  int320m_T im;
+} cint320m_T;
+
+typedef struct {
+  uint64_T chunks[5];
+} uint320m_T;
+
+typedef struct {
+  uint320m_T re;
+  uint320m_T im;
+} cuint320m_T;
+
+typedef struct {
+  uint64_T chunks[6];
+} int384m_T;
+
+typedef struct {
+  int384m_T re;
+  int384m_T im;
+} cint384m_T;
+
+typedef struct {
+  uint64_T chunks[6];
+} uint384m_T;
+
+typedef struct {
+  uint384m_T re;
+  uint384m_T im;
+} cuint384m_T;
+
+typedef struct {
+  uint64_T chunks[7];
+} int448m_T;
+
+typedef struct {
+  int448m_T re;
+  int448m_T im;
+} cint448m_T;
+
+typedef struct {
+  uint64_T chunks[7];
+} uint448m_T;
+
+typedef struct {
+  uint448m_T re;
+  uint448m_T im;
+} cuint448m_T;
+
+typedef struct {
+  uint64_T chunks[8];
+} int512m_T;
+
+typedef struct {
+  int512m_T re;
+  int512m_T im;
+} cint512m_T;
+
+typedef struct {
+  uint64_T chunks[8];
+} uint512m_T;
+
+typedef struct {
+  uint512m_T re;
+  uint512m_T im;
+} cuint512m_T;
+
+typedef struct {
+  uint64_T chunks[9];
+} int576m_T;
+
+typedef struct {
+  int576m_T re;
+  int576m_T im;
+} cint576m_T;
+
+typedef struct {
+  uint64_T chunks[9];
+} uint576m_T;
+
+typedef struct {
+  uint576m_T re;
+  uint576m_T im;
+} cuint576m_T;
+
+typedef struct {
+  uint64_T chunks[10];
+} int640m_T;
+
+typedef struct {
+  int640m_T re;
+  int640m_T im;
+} cint640m_T;
+
+typedef struct {
+  uint64_T chunks[10];
+} uint640m_T;
+
+typedef struct {
+  uint640m_T re;
+  uint640m_T im;
+} cuint640m_T;
+
+typedef struct {
+  uint64_T chunks[11];
+} int704m_T;
+
+typedef struct {
+  int704m_T re;
+  int704m_T im;
+} cint704m_T;
+
+typedef struct {
+  uint64_T chunks[11];
+} uint704m_T;
+
+typedef struct {
+  uint704m_T re;
+  uint704m_T im;
+} cuint704m_T;
+
+typedef struct {
+  uint64_T chunks[12];
+} int768m_T;
+
+typedef struct {
+  int768m_T re;
+  int768m_T im;
+} cint768m_T;
+
+typedef struct {
+  uint64_T chunks[12];
+} uint768m_T;
+
+typedef struct {
+  uint768m_T re;
+  uint768m_T im;
+} cuint768m_T;
+
+typedef struct {
+  uint64_T chunks[13];
+} int832m_T;
+
+typedef struct {
+  int832m_T re;
+  int832m_T im;
+} cint832m_T;
+
+typedef struct {
+  uint64_T chunks[13];
+} uint832m_T;
+
+typedef struct {
+  uint832m_T re;
+  uint832m_T im;
+} cuint832m_T;
+
+typedef struct {
+  uint64_T chunks[14];
+} int896m_T;
+
+typedef struct {
+  int896m_T re;
+  int896m_T im;
+} cint896m_T;
+
+typedef struct {
+  uint64_T chunks[14];
+} uint896m_T;
+
+typedef struct {
+  uint896m_T re;
+  uint896m_T im;
+} cuint896m_T;
+
+typedef struct {
+  uint64_T chunks[15];
+} int960m_T;
+
+typedef struct {
+  int960m_T re;
+  int960m_T im;
+} cint960m_T;
+
+typedef struct {
+  uint64_T chunks[15];
+} uint960m_T;
+
+typedef struct {
+  uint960m_T re;
+  uint960m_T im;
+} cuint960m_T;
+
+typedef struct {
+  uint64_T chunks[16];
+} int1024m_T;
+
+typedef struct {
+  int1024m_T re;
+  int1024m_T im;
+} cint1024m_T;
+
+typedef struct {
+  uint64_T chunks[16];
+} uint1024m_T;
+
+typedef struct {
+  uint1024m_T re;
+  uint1024m_T im;
+} cuint1024m_T;
+
+typedef struct {
+  uint64_T chunks[17];
+} int1088m_T;
+
+typedef struct {
+  int1088m_T re;
+  int1088m_T im;
+} cint1088m_T;
+
+typedef struct {
+  uint64_T chunks[17];
+} uint1088m_T;
+
+typedef struct {
+  uint1088m_T re;
+  uint1088m_T im;
+} cuint1088m_T;
+
+typedef struct {
+  uint64_T chunks[18];
+} int1152m_T;
+
+typedef struct {
+  int1152m_T re;
+  int1152m_T im;
+} cint1152m_T;
+
+typedef struct {
+  uint64_T chunks[18];
+} uint1152m_T;
+
+typedef struct {
+  uint1152m_T re;
+  uint1152m_T im;
+} cuint1152m_T;
+
+typedef struct {
+  uint64_T chunks[19];
+} int1216m_T;
+
+typedef struct {
+  int1216m_T re;
+  int1216m_T im;
+} cint1216m_T;
+
+typedef struct {
+  uint64_T chunks[19];
+} uint1216m_T;
+
+typedef struct {
+  uint1216m_T re;
+  uint1216m_T im;
+} cuint1216m_T;
+
+typedef struct {
+  uint64_T chunks[20];
+} int1280m_T;
+
+typedef struct {
+  int1280m_T re;
+  int1280m_T im;
+} cint1280m_T;
+
+typedef struct {
+  uint64_T chunks[20];
+} uint1280m_T;
+
+typedef struct {
+  uint1280m_T re;
+  uint1280m_T im;
+} cuint1280m_T;
+
+typedef struct {
+  uint64_T chunks[21];
+} int1344m_T;
+
+typedef struct {
+  int1344m_T re;
+  int1344m_T im;
+} cint1344m_T;
+
+typedef struct {
+  uint64_T chunks[21];
+} uint1344m_T;
+
+typedef struct {
+  uint1344m_T re;
+  uint1344m_T im;
+} cuint1344m_T;
+
+typedef struct {
+  uint64_T chunks[22];
+} int1408m_T;
+
+typedef struct {
+  int1408m_T re;
+  int1408m_T im;
+} cint1408m_T;
+
+typedef struct {
+  uint64_T chunks[22];
+} uint1408m_T;
+
+typedef struct {
+  uint1408m_T re;
+  uint1408m_T im;
+} cuint1408m_T;
+
+typedef struct {
+  uint64_T chunks[23];
+} int1472m_T;
+
+typedef struct {
+  int1472m_T re;
+  int1472m_T im;
+} cint1472m_T;
+
+typedef struct {
+  uint64_T chunks[23];
+} uint1472m_T;
+
+typedef struct {
+  uint1472m_T re;
+  uint1472m_T im;
+} cuint1472m_T;
+
+typedef struct {
+  uint64_T chunks[24];
+} int1536m_T;
+
+typedef struct {
+  int1536m_T re;
+  int1536m_T im;
+} cint1536m_T;
+
+typedef struct {
+  uint64_T chunks[24];
+} uint1536m_T;
+
+typedef struct {
+  uint1536m_T re;
+  uint1536m_T im;
+} cuint1536m_T;
+
+typedef struct {
+  uint64_T chunks[25];
+} int1600m_T;
+
+typedef struct {
+  int1600m_T re;
+  int1600m_T im;
+} cint1600m_T;
+
+typedef struct {
+  uint64_T chunks[25];
+} uint1600m_T;
+
+typedef struct {
+  uint1600m_T re;
+  uint1600m_T im;
+} cuint1600m_T;
+
+typedef struct {
+  uint64_T chunks[26];
+} int1664m_T;
+
+typedef struct {
+  int1664m_T re;
+  int1664m_T im;
+} cint1664m_T;
+
+typedef struct {
+  uint64_T chunks[26];
+} uint1664m_T;
+
+typedef struct {
+  uint1664m_T re;
+  uint1664m_T im;
+} cuint1664m_T;
+
+typedef struct {
+  uint64_T chunks[27];
+} int1728m_T;
+
+typedef struct {
+  int1728m_T re;
+  int1728m_T im;
+} cint1728m_T;
+
+typedef struct {
+  uint64_T chunks[27];
+} uint1728m_T;
+
+typedef struct {
+  uint1728m_T re;
+  uint1728m_T im;
+} cuint1728m_T;
+
+typedef struct {
+  uint64_T chunks[28];
+} int1792m_T;
+
+typedef struct {
+  int1792m_T re;
+  int1792m_T im;
+} cint1792m_T;
+
+typedef struct {
+  uint64_T chunks[28];
+} uint1792m_T;
+
+typedef struct {
+  uint1792m_T re;
+  uint1792m_T im;
+} cuint1792m_T;
+
+typedef struct {
+  uint64_T chunks[29];
+} int1856m_T;
+
+typedef struct {
+  int1856m_T re;
+  int1856m_T im;
+} cint1856m_T;
+
+typedef struct {
+  uint64_T chunks[29];
+} uint1856m_T;
+
+typedef struct {
+  uint1856m_T re;
+  uint1856m_T im;
+} cuint1856m_T;
+
+typedef struct {
+  uint64_T chunks[30];
+} int1920m_T;
+
+typedef struct {
+  int1920m_T re;
+  int1920m_T im;
+} cint1920m_T;
+
+typedef struct {
+  uint64_T chunks[30];
+} uint1920m_T;
+
+typedef struct {
+  uint1920m_T re;
+  uint1920m_T im;
+} cuint1920m_T;
+
+typedef struct {
+  uint64_T chunks[31];
+} int1984m_T;
+
+typedef struct {
+  int1984m_T re;
+  int1984m_T im;
+} cint1984m_T;
+
+typedef struct {
+  uint64_T chunks[31];
+} uint1984m_T;
+
+typedef struct {
+  uint1984m_T re;
+  uint1984m_T im;
+} cuint1984m_T;
+
+typedef struct {
+  uint64_T chunks[32];
+} int2048m_T;
+
+typedef struct {
+  int2048m_T re;
+  int2048m_T im;
+} cint2048m_T;
+
+typedef struct {
+  uint64_T chunks[32];
+} uint2048m_T;
+
+typedef struct {
+  uint2048m_T re;
+  uint2048m_T im;
+} cuint2048m_T;
+
+#endif                                 /* MULTIWORD_TYPES_H */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtGetInf.cpp

@@ -0,0 +1,160 @@
+/*
+ * rtGetInf.cpp
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+
+extern "C"
+{
+
+#include "rtGetInf.h"
+
+}
+
+#include <stddef.h>
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#define NumBitsPerChar                 8U
+
+extern "C"
+{
+  /*
+   * Initialize rtInf needed by the generated code.
+   * Inf is initialized as non-signaling. Assumes IEEE.
+   */
+  real_T rtGetInf(void)
+  {
+    size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+    real_T inf = 0.0;
+    if (bitsPerReal == 32U) {
+      inf = rtGetInfF();
+    } else {
+      uint16_T one = 1U;
+      enum {
+        LittleEndian,
+        BigEndian
+      } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
+      switch (machByteOrder) {
+       case LittleEndian:
+        {
+          union {
+            LittleEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0x7FF00000U;
+          tmpVal.bitVal.words.wordL = 0x00000000U;
+          inf = tmpVal.fltVal;
+          break;
+        }
+
+       case BigEndian:
+        {
+          union {
+            BigEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0x7FF00000U;
+          tmpVal.bitVal.words.wordL = 0x00000000U;
+          inf = tmpVal.fltVal;
+          break;
+        }
+      }
+    }
+
+    return inf;
+  }
+
+  /*
+   * Initialize rtInfF needed by the generated code.
+   * Inf is initialized as non-signaling. Assumes IEEE.
+   */
+  real32_T rtGetInfF(void)
+  {
+    IEEESingle infF;
+    infF.wordL.wordLuint = 0x7F800000U;
+    return infF.wordL.wordLreal;
+  }
+
+  /*
+   * Initialize rtMinusInf needed by the generated code.
+   * Inf is initialized as non-signaling. Assumes IEEE.
+   */
+  real_T rtGetMinusInf(void)
+  {
+    size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+    real_T minf = 0.0;
+    if (bitsPerReal == 32U) {
+      minf = rtGetMinusInfF();
+    } else {
+      uint16_T one = 1U;
+      enum {
+        LittleEndian,
+        BigEndian
+      } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
+      switch (machByteOrder) {
+       case LittleEndian:
+        {
+          union {
+            LittleEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0xFFF00000U;
+          tmpVal.bitVal.words.wordL = 0x00000000U;
+          minf = tmpVal.fltVal;
+          break;
+        }
+
+       case BigEndian:
+        {
+          union {
+            BigEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0xFFF00000U;
+          tmpVal.bitVal.words.wordL = 0x00000000U;
+          minf = tmpVal.fltVal;
+          break;
+        }
+      }
+    }
+
+    return minf;
+  }
+
+  /*
+   * Initialize rtMinusInfF needed by the generated code.
+   * Inf is initialized as non-signaling. Assumes IEEE.
+   */
+  real32_T rtGetMinusInfF(void)
+  {
+    IEEESingle minfF;
+    minfF.wordL.wordLuint = 0xFF800000U;
+    return minfF.wordL.wordLreal;
+  }
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtGetInf.h

@@ -0,0 +1,49 @@
+/*
+ * rtGetInf.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef rtGetInf_h_
+#define rtGetInf_h_
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#include "rtwtypes.h"
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern real_T rtGetInf(void);
+  extern real32_T rtGetInfF(void);
+  extern real_T rtGetMinusInf(void);
+  extern real32_T rtGetMinusInfF(void);
+
+#ifdef __cplusplus
+
+}                                      /* extern "C" */
+
+#endif
+#endif                                 /* rtGetInf_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtGetNaN.cpp

@@ -0,0 +1,120 @@
+/*
+ * rtGetNaN.cpp
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+
+extern "C"
+{
+
+#include "rtGetNaN.h"
+
+}
+
+#include <stddef.h>
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#define NumBitsPerChar                 8U
+
+extern "C"
+{
+  /*
+   * Initialize rtNaN needed by the generated code.
+   * NaN is initialized as non-signaling. Assumes IEEE.
+   */
+  real_T rtGetNaN(void)
+  {
+    size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+    real_T nan = 0.0;
+    if (bitsPerReal == 32U) {
+      nan = rtGetNaNF();
+    } else {
+      uint16_T one = 1U;
+      enum {
+        LittleEndian,
+        BigEndian
+      } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
+      switch (machByteOrder) {
+       case LittleEndian:
+        {
+          union {
+            LittleEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0xFFF80000U;
+          tmpVal.bitVal.words.wordL = 0x00000000U;
+          nan = tmpVal.fltVal;
+          break;
+        }
+
+       case BigEndian:
+        {
+          union {
+            BigEndianIEEEDouble bitVal;
+            real_T fltVal;
+          } tmpVal;
+
+          tmpVal.bitVal.words.wordH = 0x7FFFFFFFU;
+          tmpVal.bitVal.words.wordL = 0xFFFFFFFFU;
+          nan = tmpVal.fltVal;
+          break;
+        }
+      }
+    }
+
+    return nan;
+  }
+
+  /*
+   * Initialize rtNaNF needed by the generated code.
+   * NaN is initialized as non-signaling. Assumes IEEE.
+   */
+  real32_T rtGetNaNF(void)
+  {
+    IEEESingle nanF = { { 0.0F } };
+
+    uint16_T one = 1U;
+    enum {
+      LittleEndian,
+      BigEndian
+    } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
+    switch (machByteOrder) {
+     case LittleEndian:
+      {
+        nanF.wordL.wordLuint = 0xFFC00000U;
+        break;
+      }
+
+     case BigEndian:
+      {
+        nanF.wordL.wordLuint = 0x7FFFFFFFU;
+        break;
+      }
+    }
+
+    return nanF.wordL.wordLreal;
+  }
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtGetNaN.h

@@ -0,0 +1,47 @@
+/*
+ * rtGetNaN.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef rtGetNaN_h_
+#define rtGetNaN_h_
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#include "rtwtypes.h"
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern real_T rtGetNaN(void);
+  extern real32_T rtGetNaNF(void);
+
+#ifdef __cplusplus
+
+}                                      /* extern "C" */
+
+#endif
+#endif                                 /* rtGetNaN_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rt_nonfinite.cpp

@@ -0,0 +1,117 @@
+/*
+ * rt_nonfinite.cpp
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+extern "C"
+{
+
+#include "rtGetNaN.h"
+
+}
+
+extern "C"
+{
+
+#include "rtGetInf.h"
+
+}
+
+#include <stddef.h>
+#include "rtwtypes.h"
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#define NumBitsPerChar                 8U
+
+extern "C"
+{
+  real_T rtInf;
+  real_T rtMinusInf;
+  real_T rtNaN;
+  real32_T rtInfF;
+  real32_T rtMinusInfF;
+  real32_T rtNaNF;
+}
+
+extern "C"
+{
+  /*
+   * Initialize the rtInf, rtMinusInf, and rtNaN needed by the
+   * generated code. NaN is initialized as non-signaling. Assumes IEEE.
+   */
+  void rt_InitInfAndNaN(size_t realSize)
+  {
+    (void) (realSize);
+    rtNaN = rtGetNaN();
+    rtNaNF = rtGetNaNF();
+    rtInf = rtGetInf();
+    rtInfF = rtGetInfF();
+    rtMinusInf = rtGetMinusInf();
+    rtMinusInfF = rtGetMinusInfF();
+  }
+
+  /* Test if value is infinite */
+  boolean_T rtIsInf(real_T value)
+  {
+    return (boolean_T)((value==rtInf || value==rtMinusInf) ? 1U : 0U);
+  }
+
+  /* Test if single-precision value is infinite */
+  boolean_T rtIsInfF(real32_T value)
+  {
+    return (boolean_T)(((value)==rtInfF || (value)==rtMinusInfF) ? 1U : 0U);
+  }
+
+  /* Test if value is not a number */
+  boolean_T rtIsNaN(real_T value)
+  {
+    boolean_T result = (boolean_T) 0;
+    size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+    if (bitsPerReal == 32U) {
+      result = rtIsNaNF((real32_T)value);
+    } else {
+      union {
+        LittleEndianIEEEDouble bitVal;
+        real_T fltVal;
+      } tmpVal;
+
+      tmpVal.fltVal = value;
+      result = (boolean_T)((tmpVal.bitVal.words.wordH & 0x7FF00000) ==
+                           0x7FF00000 &&
+                           ( (tmpVal.bitVal.words.wordH & 0x000FFFFF) != 0 ||
+                            (tmpVal.bitVal.words.wordL != 0) ));
+    }
+
+    return result;
+  }
+
+  /* Test if single-precision value is not a number */
+  boolean_T rtIsNaNF(real32_T value)
+  {
+    IEEESingle tmp;
+    tmp.wordL.wordLreal = value;
+    return (boolean_T)( (tmp.wordL.wordLuint & 0x7F800000) == 0x7F800000 &&
+                       (tmp.wordL.wordLuint & 0x007FFFFF) != 0 );
+  }
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/rt_nonfinite.h

@@ -0,0 +1,70 @@
+/*
+ * rt_nonfinite.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef rt_nonfinite_h_
+#define rt_nonfinite_h_
+#include <stddef.h>
+#include "rtwtypes.h"
+#define NOT_USING_NONFINITE_LITERALS   1
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern real_T rtInf;
+  extern real_T rtMinusInf;
+  extern real_T rtNaN;
+  extern real32_T rtInfF;
+  extern real32_T rtMinusInfF;
+  extern real32_T rtNaNF;
+  extern void rt_InitInfAndNaN(size_t realSize);
+  extern boolean_T rtIsInf(real_T value);
+  extern boolean_T rtIsInfF(real32_T value);
+  extern boolean_T rtIsNaN(real_T value);
+  extern boolean_T rtIsNaNF(real32_T value);
+  struct BigEndianIEEEDouble {
+    struct {
+      uint32_T wordH;
+      uint32_T wordL;
+    } words;
+  };
+
+  struct LittleEndianIEEEDouble {
+    struct {
+      uint32_T wordL;
+      uint32_T wordH;
+    } words;
+  };
+
+  struct IEEESingle {
+    union {
+      real32_T wordLreal;
+      uint32_T wordLuint;
+    } wordL;
+  };
+
+#ifdef __cplusplus
+
+}                                      /* extern "C" */
+
+#endif
+#endif                                 /* rt_nonfinite_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rt_zcfcn.cpp

@@ -0,0 +1,99 @@
+/*
+ * rt_zcfcn.cpp
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "zero_crossing_types.h"
+#include "rtwtypes.h"
+#include "rt_zcfcn.h"
+#include "solver_zc.h"
+
+extern "C"
+{
+  /* Detect zero crossings events. */
+  ZCEventType rt_ZCFcn(ZCDirection zcDir, ZCSigState *prevZc, real_T currValue)
+  {
+    slZcEventType zcsDir;
+    slZcEventType tempEv;
+    ZCEventType zcEvent = NO_ZCEVENT;  /* assume */
+
+    /* zcEvent matrix */
+    static const slZcEventType eventMatrix[4][4] = {
+      /*          ZER              POS              NEG              UNK */
+      { SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_Z2P, SL_ZCS_EVENT_Z2N, SL_ZCS_EVENT_NUL },/* ZER */
+
+      { SL_ZCS_EVENT_P2Z, SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_P2N, SL_ZCS_EVENT_NUL },/* POS */
+
+      { SL_ZCS_EVENT_N2Z, SL_ZCS_EVENT_N2P, SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_NUL },/* NEG */
+
+      { SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_NUL, SL_ZCS_EVENT_NUL }/* UNK */
+    };
+
+    /* get prevZcEvent and prevZcSign from prevZc */
+    const slZcEventType prevEv = (slZcEventType)(((uint8_T)(*prevZc)) >> 2);
+    const slZcSignalSignType prevSign = (slZcSignalSignType)(((uint8_T)(*prevZc))
+      & (uint8_T)0x03);
+
+    /* get current zcSignal sign from current zcSignal value */
+    const slZcSignalSignType currSign = (slZcSignalSignType)((currValue) > 0.0 ?
+      SL_ZCS_SIGN_POS :
+      ((currValue) < 0.0 ? SL_ZCS_SIGN_NEG : SL_ZCS_SIGN_ZERO));
+
+    /* get current zcEvent based on prev and current zcSignal value */
+    slZcEventType currEv = eventMatrix[prevSign][currSign];
+
+    /* get slZcEventType from ZCDirection */
+    switch (zcDir) {
+     case ANY_ZERO_CROSSING:
+      zcsDir = SL_ZCS_EVENT_ALL;
+      break;
+
+     case FALLING_ZERO_CROSSING:
+      zcsDir = SL_ZCS_EVENT_ALL_DN;
+      break;
+
+     case RISING_ZERO_CROSSING:
+      zcsDir = SL_ZCS_EVENT_ALL_UP;
+      break;
+
+     default:
+      zcsDir = SL_ZCS_EVENT_NUL;
+      break;
+    }
+
+    /* had event, check if zc happened */
+    if (slZcHadEvent(currEv, zcsDir)) {
+      currEv = (slZcEventType)(slZcUnAliasEvents(prevEv, currEv));
+    } else {
+      currEv = SL_ZCS_EVENT_NUL;
+    }
+
+    /* Update prevZc */
+    tempEv = (slZcEventType)(currEv << 2);/* shift left by 2 bits */
+    *prevZc = (ZCSigState)((currSign) | (tempEv));
+    if ((currEv & SL_ZCS_EVENT_ALL_DN) != 0) {
+      zcEvent = FALLING_ZCEVENT;
+    } else if ((currEv & SL_ZCS_EVENT_ALL_UP) != 0) {
+      zcEvent = RISING_ZCEVENT;
+    } else {
+      zcEvent = NO_ZCEVENT;
+    }
+
+    return zcEvent;
+  }                                    /* rt_ZCFcn */
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/rt_zcfcn.h

@@ -0,0 +1,48 @@
+/*
+ * rt_zcfcn.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef rt_zcfcn_h_
+#define rt_zcfcn_h_
+#include "zero_crossing_types.h"
+#include "rtwtypes.h"
+#ifndef slZcHadEvent
+#define slZcHadEvent(ev, zcsDir)       (((ev) & (zcsDir)) != 0x00 )
+#endif
+
+#ifndef slZcUnAliasEvents
+#define slZcUnAliasEvents(evL, evR)    ((((slZcHadEvent((evL), (SL_ZCS_EVENT_N2Z)) && slZcHadEvent((evR), (SL_ZCS_EVENT_Z2P))) || (slZcHadEvent((evL), (SL_ZCS_EVENT_P2Z)) && slZcHadEvent((evR), (SL_ZCS_EVENT_Z2N)))) ? (SL_ZCS_EVENT_NUL) : (evR)))
+#endif
+
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern ZCEventType rt_ZCFcn(ZCDirection zcDir, ZCSigState *prevZc, real_T
+    currValue);
+
+#ifdef __cplusplus
+
+}                                      /* extern "C" */
+
+#endif
+#endif                                 /* rt_zcfcn_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rte_Alinear_encoder_parameters.cpp

@@ -0,0 +1,44 @@
+#include "rte_Alinear_encoder_parameters.h"
+#include "Alinear_encoder.h"
+#include "Alinear_encoder_cal.h"
+
+RTE_Param_Service_T RTE_Param_Service = {
+  0.020943951023931952,
+  -0.94248,
+  1193.6620731892151
+};
+
+RTE_Param_Service_T *RTE_Param_Service_ptr = &RTE_Param_Service;
+real_T* get_cte_encoder(void)
+{
+  return &RTE_Param_Service_ptr->cte_encoder;
+}
+
+real_T* get_desfase_z_d(void)
+{
+  return &RTE_Param_Service_ptr->desfase_z_d;
+}
+
+real_T* get_gain_velocidad(void)
+{
+  return &RTE_Param_Service_ptr->gain_velocidad;
+}
+
+extern Alinear_encoder_cal_type Alinear_encoder_cal_impl;
+extern RTE_Param_Service_T RTE_Param_Service;
+namespace slrealtime
+{
+  /* Description of SEGMENTS */
+  SegmentVector segmentInfo {
+    { (void*)&RTE_Param_Service, (void**)&RTE_Param_Service_ptr, sizeof
+      (RTE_Param_Service_T), 2 },
+
+    { (void*)&Alinear_encoder_cal_impl, (void**)&Alinear_encoder_cal, sizeof
+      (Alinear_encoder_cal_type), 2 }
+  };
+
+  SegmentVector &getSegmentVector(void)
+  {
+    return segmentInfo;
+  }
+}                                      // slrealtime

Control_Vectorial/real/Alinear_encoder_sg_rtw/rte_Alinear_encoder_parameters.h

@@ -0,0 +1,25 @@
+#ifndef _RTE_ALINEAR_ENCODER_PARAMETERS_H
+#define _RTE_ALINEAR_ENCODER_PARAMETERS_H
+#include "rtwtypes.h"
+#include "SegmentInfo.hpp"
+#include "multiword_types.h"
+#include "zero_crossing_types.h"
+#include "Alinear_encoder_types.h"
+
+struct RTE_Param_Service_T {
+  real_T cte_encoder;
+  real_T desfase_z_d;
+  real_T gain_velocidad;
+};
+
+extern RTE_Param_Service_T RTE_Param_Service;
+extern RTE_Param_Service_T *RTE_Param_Service_ptr;
+real_T* get_cte_encoder(void);
+real_T* get_desfase_z_d(void);
+real_T* get_gain_velocidad(void);
+namespace slrealtime
+{
+  SegmentVector &getSegmentVector(void);
+}                                      // slrealtime
+
+#endif

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtmodel.h

@@ -0,0 +1,25 @@
+/*
+ *  rtmodel.h:
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef rtmodel_h_
+#define rtmodel_h_
+#include "Alinear_encoder.h"
+#define GRTINTERFACE                   0
+#endif                                 /* rtmodel_h_ */

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtw_proj.tmw

@@ -0,0 +1,4 @@
+Simulink Coder project for Alinear_encoder using . MATLAB root = C:\Program Files\MATLAB\R2024b. SimStruct date: 21-jun-2024 21:53:13
+This file is generated by Simulink Coder for use by the make utility
+to determine when to rebuild objects when the name of the current Simulink Coder project changes.
+The rtwinfomat located at: ..\slprj\speedgoat\Alinear_encoder\tmwinternal\binfo.mat

Control_Vectorial/real/Alinear_encoder_sg_rtw/rtwtypes.h

@@ -0,0 +1,81 @@
+/*
+ * rtwtypes.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTWTYPES_H
+#define RTWTYPES_H
+#include "tmwtypes.h"
+#ifndef POINTER_T
+#define POINTER_T
+
+typedef void * pointer_T;
+
+#endif
+
+/* Logical type definitions */
+#if (!defined(__cplusplus))
+#ifndef false
+#define false                          (0U)
+#endif
+
+#ifndef true
+#define true                           (1U)
+#endif
+#endif
+
+#ifndef INT64_T
+#define INT64_T
+
+typedef long int64_T;
+
+#define MAX_int64_T                    ((int64_T)(9223372036854775807L))
+#define MIN_int64_T                    ((int64_T)(-9223372036854775807L-1L))
+#endif
+
+#ifndef UINT64_T
+#define UINT64_T
+
+typedef unsigned long uint64_T;
+
+#define MAX_uint64_T                   ((uint64_T)(0xFFFFFFFFFFFFFFFFUL))
+#endif
+
+/*===========================================================================*
+ * Additional complex number type definitions                                           *
+ *===========================================================================*/
+#ifndef CINT64_T
+#define CINT64_T
+
+typedef struct {
+  int64_T re;
+  int64_T im;
+} cint64_T;
+
+#endif
+
+#ifndef CUINT64_T
+#define CUINT64_T
+
+typedef struct {
+  uint64_T re;
+  uint64_T im;
+} cuint64_T;
+
+#endif
+#endif                                 /* RTWTYPES_H */

Control_Vectorial/real/Alinear_encoder_sg_rtw/sg_early_init.cpp

@@ -0,0 +1,169 @@
+#include "Alinear_encoder.h"
+#include "Alinear_encoder_private.h"
+#include "sg_printf.h"
+#include "sg_early_init.h"
+#include "simstruc.h" // This is required if there are no S-function blocks in the model
+
+static RTWSfcnInfo sgEarlyInitSfcnInfo;
+struct _ssBlkInfo2 sgEarlyInitBlkInfo2 = {.rtwSfcnInfo = &sgEarlyInitSfcnInfo};
+
+void sg_init_sfcns(void)
+{
+    sg_printf(sg_debug, "Initializing [EARLY INIT] S-functions\n");
+    
+    rtssSetErrorStatusPtr(&sgEarlyInitSfcnInfo, (&rtmGetErrorStatus(Alinear_encoder_M)));
+    sg_early_init_set_blkInfo2((void*)&sgEarlyInitBlkInfo2);
+    
+    {
+        int32_t ErrCode;
+        uint32_t i;
+        uint32_t *bitstream = NULL;
+        uint8_t *fpgacode = NULL;
+        char *devname;
+        sg_fpga_io3xxModuleIdT  moduleId;
+        FILE *mcs;
+        static char mcsBinFile[200];
+        static char msg[500];
+
+        sg_initModelRun();
+
+        // Determine path to bitstream file
+        if (sg_getModelBaseDir(mcsBinFile, sizeof(mcsBinFile))) {
+            sprintf(msg, "Could not determine location of the model on the target machine.");
+            rtmSetErrorStatus(Alinear_encoder_M, msg);
+            return;
+        }
+        if ((strlen(mcsBinFile) + strlen("/fpga/speedgoat_IO397_RCP.mcs") + 1) > sizeof(mcsBinFile)) {
+            sprintf(msg, "Path to the bitstream (model name + bitstream name) is too long.");
+            rtmSetErrorStatus(Alinear_encoder_M, msg);
+            return;
+        }
+        strcat(mcsBinFile, "/fpga/speedgoat_IO397_RCP.mcs");
+        SG_PRINTF(DEBUG, "Bitstream: %s\n", mcsBinFile);
+
+            // Read bitstream file
+            if ((mcs = fopen(mcsBinFile, "r")) == NULL){
+                sprintf(msg, "Bitstream file not found at %s\n", mcsBinFile);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return; 
+            }
+            bitstream = (uint32_t *) malloc(2192012*sizeof(uint32_t));
+            fpgacode = (uint8_t *) malloc(2192012*sizeof(uint8_t));
+            for(i = 0; i<2192012; i++){
+                fscanf(mcs, "%d\n", &bitstream[i]);
+                fpgacode[i] = bitstream[i];
+            }
+            fclose(mcs);
+
+        // Get module IDs (PIC info)
+        SG_PRINTF(INFO,"Getting module information.\n");
+        ErrCode = (int32_t)sg_fpga_IO3xxGetModuleId(39750, &moduleId);
+
+        if (ErrCode >= 0)
+        {
+            devname = moduleId.devname;
+        
+            SG_PRINTF(DEBUG, "boardType: %d\n", 39750);
+            SG_PRINTF(DEBUG, "ErrCode: %d\n", ErrCode);
+            SG_PRINTF(DEBUG, "******************************************\n");
+            SG_PRINTF(DEBUG, "moduleId->devname: %s\n", moduleId.devname);
+            SG_PRINTF(DEBUG, "moduleId->vendorid: 0x%x\n", moduleId.vendorid);
+            SG_PRINTF(DEBUG, "moduleId->subvendorid: 0x%x\n", moduleId.subvendorid);
+            SG_PRINTF(DEBUG, "moduleId->deviceid: 0x%x\n", moduleId.deviceid);
+            SG_PRINTF(DEBUG, "moduleId->subdeviceid: 0x%x\n", moduleId.subdeviceid);
+            SG_PRINTF(DEBUG, "moduleId.moduleArchitecture: %d\n", moduleId.moduleArchitecture);
+        }
+        else
+        {
+            sprintf(msg, "Setup block: board type unknown.");
+            rtmSetErrorStatus(Alinear_encoder_M, msg);
+            SG_PRINTF(ERROR,msg);
+            return;
+        }
+        // Call the programming function
+        SG_PRINTF(INFO,"Running board specific programming file.\n");
+            ErrCode = IO39x_programmFPGA(devname, (int16_t)6, (int16_t)0,
+                (int32_t)1, (int32_t)1,
+                (uint32_t)2192012, fpgacode, (uint32_t)85, &moduleId);
+
+        // Set board type (by now the board is registered)
+        io3xxSetBoardTypeSgLib(1, 39750);
+
+        // Free the bitstream allocation
+        free(bitstream);
+        free(fpgacode);
+
+        // Handle any error states
+        switch (ErrCode)
+        {
+            case NO_ERR:
+                // Nothing to do.
+                break;
+
+            case BOARD_NOT_FOUND:
+                // reason for this error can be found in the pSgErrorStr (error message from sg-lib (sg_findPciDevice))
+                sprintf(msg, "%s", pSgErrorStr);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case EEPROM_ERROR:
+                sprintf(msg, "Setup block %s: Error updating board EEPROM.\n", devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case REPROG_ERROR:
+                sprintf(msg, "Setup block %s: Error writing new bitstream to FPGA.\n", devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case FLASH_ERROR:
+                sprintf(msg, "Setup block %s: Bitstream flash storage error.\n", devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case BIST_ERROR:
+                sprintf(msg, "Setup block %s: Built in self test error.\n", devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case ICAP_RECONF_FAILED:
+                sprintf(msg, "Setup block %s: ICAP Reconfiguration was not successful.\n",devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            case BOARD_TYPE_UNKNOWN:
+                sprintf(msg, "Setup block %s: The board type selected is unknown.\n",devname);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+
+            default:
+                sprintf(msg, "Setup block %s: An unknown error %d occurred.\n",devname, ErrCode);
+                rtmSetErrorStatus(Alinear_encoder_M, msg);
+                SG_PRINTF(ERROR,msg);
+                return;
+        }
+
+
+        // initial settings on module registry        
+        // Set all DIO's to registry inital values (all input, all output states = 0, all sources = codemodule)
+        sg_fpga_io3xx_initDioLines(1, SG_FPGA_IO3XX_BAR2);
+
+        // Set if FPGA DMA Controller is used
+        ScatterGatherDmaState *sgDmaSharedState;
+        sg_fpga_io3xx_getSharedSgDmaState(1, &sgDmaSharedState);
+        sgDmaSharedState->useFpgaDmaController = 0;
+    }
+}
+
+__attribute__((constructor)) void early_init_setup(void)
+{
+    sg_register_early_init_function(sg_init_sfcns);
+}

Control_Vectorial/real/Alinear_encoder_sg_rtw/slrealtime_datatype_ground.cpp

@@ -0,0 +1,9 @@
+#include "slrtdatatypes.h"
+
+const serialfifoptr serialfifoground = { 0, 0, 0 };
+
+const bcmsglist1553 bcmsg1553ground = { 0, 0, 0, 0 };
+
+const bcstatus1553 bcstatground = { 0, 0, 0, 0, 0, 0 };
+
+const bmmsglist1553 bmmsg1553ground = { 0, 0, 0, 0 };

Control_Vectorial/real/Alinear_encoder_sg_rtw/slrealtime_task_info.m

@@ -0,0 +1,17 @@
+function [taskInfo, numtask, isDeploymentDiagram]=slrealtime_task_info()
+   taskInfo(1).samplePeriod = 4.0E-5;
+   taskInfo(1).sampleOffset = 0.0;
+   taskInfo(1).taskPrio = 9;
+   taskInfo(1).taskName = 'BaseRate';
+   taskInfo(1).entryPoints = {};
+   numtask = 1;
+   for i = 1:numtask
+      if ( 0 == isnumeric(taskInfo(i).samplePeriod) )
+         taskInfo(i).samplePeriod = evalin('base', taskInfo(i).samplePeriod);
+      end
+      if ( isempty(taskInfo(i).taskName) )
+         taskInfo(i).taskName = ['AutoGen' i ];
+      end
+   end
+   isDeploymentDiagram = 0;
+end 

Control_Vectorial/real/Alinear_encoder_sg_rtw/tmwinternal/simulink_cache.xml

@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<MF0 version="1.1" packageUris="http://schema.mathworks.com/mf0/SlCache/19700101">
+  <slcache.FileAttributes type="slcache.FileAttributes" uuid="0d87c7ba-a652-47e3-b320-7f5ce2be0307">
+    <checksum>VK1TuykirZOdd54W5qAJkFbJVBfThunkGmFWLAjhUyeI9U0bK9+uLNTdGnrtIWv9K4MYVa9bzyDi8bQKfHK+8A==</checksum>
+  </slcache.FileAttributes>
+</MF0>

Control_Vectorial/real/Alinear_encoder_sg_rtw/zero_crossing_types.h

@@ -0,0 +1,45 @@
+/*
+ * zero_crossing_types.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "Alinear_encoder".
+ *
+ * Model version              : 1.3
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Fri Aug 22 11:49:38 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef ZERO_CROSSING_TYPES_H
+#define ZERO_CROSSING_TYPES_H
+#include "rtwtypes.h"
+
+/* Trigger directions: falling, either, and rising */
+typedef enum {
+  FALLING_ZERO_CROSSING = -1,
+  ANY_ZERO_CROSSING = 0,
+  RISING_ZERO_CROSSING = 1
+} ZCDirection;
+
+/* Previous state of a trigger signal */
+typedef uint8_T ZCSigState;
+
+/* Initial value of a trigger zero crossing signal */
+#define UNINITIALIZED_ZCSIG            0x03U
+#define NEG_ZCSIG                      0x02U
+#define POS_ZCSIG                      0x01U
+#define ZERO_ZCSIG                     0x00U
+
+/* Current state of a trigger signal */
+typedef enum { FALLING_ZCEVENT = -1, NO_ZCEVENT = 0, RISING_ZCEVENT = 1 }
+  ZCEventType;
+
+#endif                                 /* ZERO_CROSSING_TYPES_H */

Control_Vectorial/real/control_vectorial_sg_rtw/Options.hpp

@@ -0,0 +1,13 @@
+#ifndef __OPTIONS_H___
+#define __OPTIONS_H___
+
+#include "simstruc_types.h"
+#ifndef MT
+#define MT 0                    /* MT may be undefined by simstruc_types.h */
+#endif
+
+#include "control_vectorial.h"
+
+#define FULLMULTITHREAD	1
+
+#endif // __OPTIONS_H___

Control_Vectorial/real/control_vectorial_sg_rtw/control_vectorial.h

@@ -0,0 +1,740 @@
+/*
+ * control_vectorial.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "control_vectorial".
+ *
+ * Model version              : 1.33
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Mon Jul 28 10:28:03 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef control_vectorial_h_
+#define control_vectorial_h_
+#include "rtwtypes.h"
+#include "simstruc.h"
+#include "fixedpoint.h"
+#include "sg_fpga_io30x_setup_util.h"
+#include "sg_fpga_io31x_io32x_setup_util.h"
+#include "sg_fpga_io33x_setup_util.h"
+#include "sg_fpga_io36x_setup_util.h"
+#include "sg_fpga_io39x_setup_util.h"
+#include "sg_fpga_io3xx_scatter_gather_dma.h"
+#include "sg_fpga_nigora_setup_util.h"
+#include "sg_common.h"
+#include "sg_printf.h"
+#include "control_vectorial_types.h"
+#include <stddef.h>
+
+extern "C"
+{
+
+#include "rtGetNaN.h"
+
+}
+
+#include <cstring>
+#include "control_vectorial_cal.h"
+
+extern "C"
+{
+
+#include "rt_nonfinite.h"
+
+}
+
+#include "zero_crossing_types.h"
+
+/* Macros for accessing real-time model data structure */
+#ifndef rtmGetContStateDisabled
+#define rtmGetContStateDisabled(rtm)   ((rtm)->contStateDisabled)
+#endif
+
+#ifndef rtmSetContStateDisabled
+#define rtmSetContStateDisabled(rtm, val) ((rtm)->contStateDisabled = (val))
+#endif
+
+#ifndef rtmGetContStates
+#define rtmGetContStates(rtm)          ((rtm)->contStates)
+#endif
+
+#ifndef rtmSetContStates
+#define rtmSetContStates(rtm, val)     ((rtm)->contStates = (val))
+#endif
+
+#ifndef rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag
+#define rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm) ((rtm)->CTOutputIncnstWithState)
+#endif
+
+#ifndef rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag
+#define rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm, val) ((rtm)->CTOutputIncnstWithState = (val))
+#endif
+
+#ifndef rtmGetDerivCacheNeedsReset
+#define rtmGetDerivCacheNeedsReset(rtm) ((rtm)->derivCacheNeedsReset)
+#endif
+
+#ifndef rtmSetDerivCacheNeedsReset
+#define rtmSetDerivCacheNeedsReset(rtm, val) ((rtm)->derivCacheNeedsReset = (val))
+#endif
+
+#ifndef rtmGetFinalTime
+#define rtmGetFinalTime(rtm)           ((rtm)->Timing.tFinal)
+#endif
+
+#ifndef rtmGetIntgData
+#define rtmGetIntgData(rtm)            ((rtm)->intgData)
+#endif
+
+#ifndef rtmSetIntgData
+#define rtmSetIntgData(rtm, val)       ((rtm)->intgData = (val))
+#endif
+
+#ifndef rtmGetOdeF
+#define rtmGetOdeF(rtm)                ((rtm)->odeF)
+#endif
+
+#ifndef rtmSetOdeF
+#define rtmSetOdeF(rtm, val)           ((rtm)->odeF = (val))
+#endif
+
+#ifndef rtmGetOdeY
+#define rtmGetOdeY(rtm)                ((rtm)->odeY)
+#endif
+
+#ifndef rtmSetOdeY
+#define rtmSetOdeY(rtm, val)           ((rtm)->odeY = (val))
+#endif
+
+#ifndef rtmGetPeriodicContStateIndices
+#define rtmGetPeriodicContStateIndices(rtm) ((rtm)->periodicContStateIndices)
+#endif
+
+#ifndef rtmSetPeriodicContStateIndices
+#define rtmSetPeriodicContStateIndices(rtm, val) ((rtm)->periodicContStateIndices = (val))
+#endif
+
+#ifndef rtmGetPeriodicContStateRanges
+#define rtmGetPeriodicContStateRanges(rtm) ((rtm)->periodicContStateRanges)
+#endif
+
+#ifndef rtmSetPeriodicContStateRanges
+#define rtmSetPeriodicContStateRanges(rtm, val) ((rtm)->periodicContStateRanges = (val))
+#endif
+
+#ifndef rtmGetSampleHitArray
+#define rtmGetSampleHitArray(rtm)      ((rtm)->Timing.sampleHitArray)
+#endif
+
+#ifndef rtmGetStepSize
+#define rtmGetStepSize(rtm)            ((rtm)->Timing.stepSize)
+#endif
+
+#ifndef rtmGetZCCacheNeedsReset
+#define rtmGetZCCacheNeedsReset(rtm)   ((rtm)->zCCacheNeedsReset)
+#endif
+
+#ifndef rtmSetZCCacheNeedsReset
+#define rtmSetZCCacheNeedsReset(rtm, val) ((rtm)->zCCacheNeedsReset = (val))
+#endif
+
+#ifndef rtmGet_TimeOfLastOutput
+#define rtmGet_TimeOfLastOutput(rtm)   ((rtm)->Timing.timeOfLastOutput)
+#endif
+
+#ifndef rtmGetdX
+#define rtmGetdX(rtm)                  ((rtm)->derivs)
+#endif
+
+#ifndef rtmSetdX
+#define rtmSetdX(rtm, val)             ((rtm)->derivs = (val))
+#endif
+
+#ifndef rtmCounterLimit
+#define rtmCounterLimit(rtm, idx)      ((rtm)->Timing.TaskCounters.cLimit[(idx)])
+#endif
+
+#ifndef rtmGetErrorStatus
+#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
+#endif
+
+#ifndef rtmSetErrorStatus
+#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
+#endif
+
+#ifndef rtmStepTask
+#define rtmStepTask(rtm, idx)          ((rtm)->Timing.TaskCounters.TID[(idx)] == 0)
+#endif
+
+#ifndef rtmGetStopRequested
+#define rtmGetStopRequested(rtm)       ((rtm)->Timing.stopRequestedFlag)
+#endif
+
+#ifndef rtmSetStopRequested
+#define rtmSetStopRequested(rtm, val)  ((rtm)->Timing.stopRequestedFlag = (val))
+#endif
+
+#ifndef rtmGetStopRequestedPtr
+#define rtmGetStopRequestedPtr(rtm)    (&((rtm)->Timing.stopRequestedFlag))
+#endif
+
+#ifndef rtmGetT
+#define rtmGetT(rtm)                   (rtmGetTPtr((rtm))[0])
+#endif
+
+#ifndef rtmGetTFinal
+#define rtmGetTFinal(rtm)              ((rtm)->Timing.tFinal)
+#endif
+
+#ifndef rtmGetTPtr
+#define rtmGetTPtr(rtm)                ((rtm)->Timing.t)
+#endif
+
+#ifndef rtmGetTStart
+#define rtmGetTStart(rtm)              ((rtm)->Timing.tStart)
+#endif
+
+#ifndef rtmTaskCounter
+#define rtmTaskCounter(rtm, idx)       ((rtm)->Timing.TaskCounters.TID[(idx)])
+#endif
+
+#ifndef rtmGetTimeOfLastOutput
+#define rtmGetTimeOfLastOutput(rtm)    ((rtm)->Timing.timeOfLastOutput)
+#endif
+
+/* Block signals (default storage) */
+struct B_control_vectorial_T {
+  real_T Encoder_o1;                   /* '<Root>/Encoder' */
+  real_T Encoder_o2;                   /* '<Root>/Encoder' */
+  real_T MultiportSwitch[2];           /* '<S5>/Multiport Switch' */
+  real_T DataTypeConversion;           /* '<S1>/Data Type Conversion' */
+  real_T Delay4;                       /* '<S1>/Delay4' */
+  real_T Delay3;                       /* '<S1>/Delay3' */
+  real_T Switch1;                      /* '<S1>/Switch1' */
+  real_T Delay1;                       /* '<S1>/Delay1' */
+  real_T Switch2;                      /* '<S1>/Switch2' */
+  real_T CTEEncoder;                   /* '<S1>/CTE Encoder' */
+  real_T Theta_r;                      /* '<S3>/p' */
+  real_T Delay2;                       /* '<S1>/Delay2' */
+  real_T Sum1;                         /* '<S1>/Sum1' */
+  real_T GainVelocidad;                /* '<S1>/Gain Velocidad' */
+  real_T p1;                           /* '<S3>/p1' */
+  real_T uwb;                          /* '<S22>/1//wb' */
+  real_T u;                            /* '<S29>/-1' */
+  real_T TrigonometricFunction;        /* '<S28>/Trigonometric Function' */
+  real_T Gain;                         /* '<S28>/Gain' */
+  real_T TrigonometricFunction1;       /* '<S28>/Trigonometric Function1' */
+  real_T TmpSignalConversionAtDotProduct[2];
+  real_T FiltroPasaBaja;               /* '<S21>/Filtro Pasa Baja' */
+  real_T FiltroPasaBaja1;              /* '<S21>/Filtro Pasa Baja1' */
+  real_T Gain1;                        /* '<S27>/Gain1' */
+  real_T FiltroPasaBaja2;              /* '<S21>/Filtro Pasa Baja2' */
+  real_T Gain2;                        /* '<S27>/Gain2' */
+  real_T Sum1_d;                       /* '<S27>/Sum1' */
+  real_T Gain_b;                       /* '<S27>/Gain' */
+  real_T Sum2;                         /* '<S27>/Sum2' */
+  real_T Gain4;                        /* '<S27>/Gain4' */
+  real_T TmpSignalConversionAtDotProdu_e[2];
+  real_T DotProduct;                   /* '<S28>/Dot Product' */
+  real_T iqiqn;                        /* '<S3>/iq->iqn' */
+  real_T Divide5;                      /* '<S29>/Divide5' */
+  real_T Conversion;                   /* '<S31>/Conversion' */
+  real_T Abs1;                         /* '<S23>/Abs1' */
+  real_T Saturation;                   /* '<S32>/Saturation' */
+  real_T Product;                      /* '<S32>/Product' */
+  real_T MinMax;                       /* '<S32>/MinMax' */
+  real_T Vdcfactor;                    /* '<S32>/Vdc factor' */
+  real_T Product1;                     /* '<S32>/Product1' */
+  real_T Gain_n;                       /* '<Root>/Gain' */
+  real_T Zerocancellationomega;        /* '<S25>/Zero-cancellation  omega' */
+  real_T Sum;                          /* '<S25>/Sum' */
+  real_T Kp;                           /* '<S39>/Kp' */
+  real_T Ki;                           /* '<S39>/Ki' */
+  real_T UnitDelay;                    /* '<S39>/Unit Delay' */
+  real_T Kaw;                          /* '<S39>/Kaw' */
+  real_T Sum1_g;                       /* '<S39>/Sum1' */
+  real_T DiscreteTimeIntegrator;       /* '<S39>/Discrete-Time Integrator' */
+  real_T Sum_o;                        /* '<S39>/Sum' */
+  real_T Switch;                       /* '<S25>/Switch' */
+  real_T SignChange;                   /* '<S32>/Sign Change' */
+  real_T Switch_o;                     /* '<S33>/Switch' */
+  real_T Switch2_e;                    /* '<S33>/Switch2' */
+  real_T Switch_m[2];                  /* '<S23>/Switch' */
+  real_T xr;                           /* '<S34>/x->r' */
+  real_T xtheta;                       /* '<S34>/x->theta' */
+  real_T Sum1_gv;                      /* '<S24>/Sum1' */
+  real_T UnitDelay_g[2];               /* '<S3>/Unit Delay' */
+  real_T vdqnvdq[2];                   /* '<S3>/vdqn-> vdq' */
+  real_T MathFunction[2];              /* '<S35>/Math Function' */
+  real_T SumofElements;                /* '<S35>/Sum of Elements' */
+  real_T Sqrt;                         /* '<S35>/Sqrt' */
+  real_T Switch_p;                     /* '<S37>/Switch' */
+  real_T Product_c;                    /* '<S35>/Product' */
+  real_T Sum_d;                        /* '<S24>/Sum' */
+  real_T Gain_a;                       /* '<S24>/Gain' */
+  real_T UnitDelay_o;                  /* '<S24>/Unit Delay' */
+  real_T Gain1_k;                      /* '<S24>/Gain1' */
+  real_T Sum4;                         /* '<S24>/Sum4' */
+  real_T DiscreteTimeIntegrator_c;     /* '<S24>/Discrete-Time Integrator' */
+  real_T Saturation_n;                 /* '<S24>/Saturation' */
+  real_T Product_l;                    /* '<S24>/Product' */
+  real_T Sum2_e;                       /* '<S24>/Sum2' */
+  real_T rx;                           /* '<S36>/r->x' */
+  real_T ididn1;                       /* '<S3>/id->idn1' */
+  real_T TmpSignalConversionAtDotProdu_g[2];
+  real_T DotProduct1;                  /* '<S28>/Dot Product1' */
+  real_T ididn;                        /* '<S3>/id->idn' */
+  real_T Sum_j;                        /* '<S29>/Sum' */
+  real_T kp;                           /* '<S29>/kp' */
+  real_T Integrator;                   /* '<S29>/Integrator' */
+  real_T ki;                           /* '<S29>/ki' */
+  real_T Sum1_k;                       /* '<S29>/Sum1' */
+  real_T Sum2_m;                       /* '<S29>/Sum2' */
+  real_T thetay;                       /* '<S36>/theta->y' */
+  real_T iqiqn1;                       /* '<S3>/iq->iqn1' */
+  real_T Sum4_f;                       /* '<S30>/Sum4' */
+  real_T kp_h;                         /* '<S30>/kp' */
+  real_T Integrator_h;                 /* '<S30>/Integrator' */
+  real_T ki_g;                         /* '<S30>/ki' */
+  real_T Sum1_i;                       /* '<S30>/Sum1' */
+  real_T k_d;                          /* '<S30>/k' */
+  real_T Divide5_l;                    /* '<S30>/Divide5' */
+  real_T Sum2_i;                       /* '<S30>/Sum2' */
+  real_T Sum3;                         /* '<S30>/Sum3' */
+  real_T Switch_k[3];                  /* '<Root>/Switch' */
+  real_T DigitalClock;                 /* '<S19>/Digital Clock' */
+  real_T Add1;                         /* '<S19>/Add1' */
+  real_T MathFunction_l;               /* '<S19>/Math Function' */
+  real_T uib1;                         /* '<S19>/1\ib1' */
+  real_T uDLookupTable;                /* '<S19>/1-D Lookup Table' */
+  real_T Add3;                         /* '<S19>/Add3' */
+  real_T Add3_g;                       /* '<S10>/Add3' */
+  real_T Gain1_k2;                     /* '<S10>/Gain1' */
+  real_T MUL1;                         /* '<S10>/MUL1' */
+  real_T Add4;                         /* '<S10>/Add4' */
+  real_T DataTypeConversion_b[6];      /* '<S2>/Data Type Conversion' */
+  real_T Abs1_c;                       /* '<S1>/Abs1' */
+  real_T Clock;                        /* '<S6>/Clock' */
+  real_T Sum_ds;                       /* '<S6>/Sum' */
+  real_T TmpRTBAtFiltroPasaBaja1Inport1;
+  real_T TmpRTBAtFiltroPasaBaja2Inport1;
+  real_T TmpRTBAtFiltroPasaBajaInport1;
+  real_T Abs;                          /* '<S29>/Abs' */
+  real_T Switch_h;                     /* '<S29>/Switch' */
+  real_T Abs_e;                        /* '<S30>/Abs' */
+  real_T Switch_e;                     /* '<S30>/Switch' */
+  real_T Sum3_k;                       /* '<S24>/Sum3' */
+  real_T Sum1_h;                       /* '<S25>/Sum1' */
+  real_T CorrientesyPar_o1;            /* '<Root>/Corrientes y Par' */
+  real_T CorrientesyPar_o2;            /* '<Root>/Corrientes y Par' */
+  real_T CorrientesyPar_o3;            /* '<Root>/Corrientes y Par' */
+  real_T TmpSignalConversionAtDotProd_ex[2];
+  real_T TrigonometricFunction_a;      /* '<S41>/Trigonometric Function' */
+  real_T Gain1_p;                      /* '<S41>/Gain1' */
+  real_T TrigonometricFunction1_h;     /* '<S41>/Trigonometric Function1' */
+  real_T TmpSignalConversionAtDotProd_gl[2];
+  real_T DotProduct1_n;                /* '<S41>/Dot Product1' */
+  real_T Gain1_i;                      /* '<S40>/Gain1' */
+  real_T Gain2_e;                      /* '<S40>/Gain2' */
+  real_T TmpSignalConversionAtDotProdu_j[2];
+  real_T DotProduct_o;                 /* '<S41>/Dot Product' */
+  real_T Gain_j;                       /* '<S40>/Gain' */
+  real_T Sum_g;                        /* '<S40>/Sum' */
+  real_T Gain3;                        /* '<S40>/Gain3' */
+  real_T Sum1_ds;                      /* '<S40>/Sum1' */
+  real_T Sum2_h;                       /* '<S25>/Sum2' */
+  real_T Kv_w;                         /* '<S25>/Kv_w' */
+  real_T radsrpm;                      /* '<S23>/rad//s->rpm' */
+  real_T LookupTableidreference;       /* '<S23>/Lookup Table id reference' */
+  real_T LookupTableiqreference;       /* '<S23>/Lookup Table iq reference' */
+  real_T TqiqRef;                      /* '<S23>/Tq--> iqRef' */
+  real_T Switch_a;                     /* '<S1>/Switch' */
+  real_T Sum_a;                        /* '<S1>/Sum' */
+  real_T Gain1_f;                      /* '<S1>/Gain1' */
+  real_T In1;                          /* '<S9>/In1' */
+  boolean_T DataTypeConversion2;       /* '<S5>/Data Type Conversion2' */
+  boolean_T Memory;                    /* '<S5>/Memory' */
+  boolean_T LogicalOperator1;          /* '<S5>/Logical Operator1' */
+  boolean_T Compare;                   /* '<S38>/Compare' */
+  boolean_T LowerRelop1;               /* '<S33>/LowerRelop1' */
+  boolean_T UpperRelop;                /* '<S33>/UpperRelop' */
+  boolean_T RelationalOperator2[3];    /* '<S14>/Relational Operator2' */
+  boolean_T LogicalOperator4[3];       /* '<S2>/Logical Operator4' */
+  boolean_T RelationalOperator;        /* '<S6>/Relational Operator' */
+  boolean_T RelationalOperator1;       /* '<S8>/Relational Operator1' */
+  boolean_T RelationalOperator1_m;     /* '<S7>/Relational Operator1' */
+};
+
+/* Block states (default storage) for system '<Root>' */
+struct DW_control_vectorial_T {
+  real_T Delay4_DSTATE;                /* '<S1>/Delay4' */
+  real_T Delay3_DSTATE[200];           /* '<S1>/Delay3' */
+  real_T Delay1_DSTATE;                /* '<S1>/Delay1' */
+  real_T Delay2_DSTATE[200];           /* '<S1>/Delay2' */
+  real_T UnitDelay_DSTATE;             /* '<S39>/Unit Delay' */
+  real_T DiscreteTimeIntegrator_DSTATE;/* '<S39>/Discrete-Time Integrator' */
+  real_T UnitDelay_DSTATE_j[2];        /* '<S3>/Unit Delay' */
+  real_T UnitDelay_DSTATE_p;           /* '<S24>/Unit Delay' */
+  real_T DiscreteTimeIntegrator_DSTATE_h;/* '<S24>/Discrete-Time Integrator' */
+  real_T TmpRTBAtFiltroPasaBaja1Inport1_[2];/* synthesized block */
+  real_T TmpRTBAtFiltroPasaBaja2Inport1_[2];/* synthesized block */
+  real_T TmpRTBAtFiltroPasaBajaInport1_B[2];/* synthesized block */
+  void *Encoder_PWORK[2];              /* '<Root>/Encoder' */
+  void *Digitaloutput_PWORK[2];        /* '<Root>/Digital output' */
+  struct {
+    void *LoggedData[2];
+  } Scope_PWORK;                       /* '<Root>/Scope' */
+
+  struct {
+    void *USERIO_P_IND;
+    void *PROG_SPACE_P_IND;
+    void *CONFIG_REGISTER_P_IND;
+    void *CONDITIONING_MODULE_IO3xx_2x_P_IND;
+    void *DEVICENAME_P_IND;
+    void *DMA_CONTROLLER_P_IND;
+  } Setup_PWORK;                       /* '<Root>/Setup' */
+
+  void *CorrientesyPar_PWORK[3];       /* '<Root>/Corrientes y Par' */
+  uint32_T m_bpIndex;                  /* '<S19>/1-D Lookup Table' */
+  int_T Digitaloutput_IWORK;           /* '<Root>/Digital output' */
+  struct {
+    int_T MODULEARCHITECTURE_I_IND;
+  } Setup_IWORK;                       /* '<Root>/Setup' */
+
+  int8_T DiscreteTimeIntegrator_PrevRese;/* '<S39>/Discrete-Time Integrator' */
+  int8_T TmpRTBAtFiltroPasaBaja1Inport_a;/* synthesized block */
+  int8_T TmpRTBAtFiltroPasaBaja1Inport_j;/* synthesized block */
+  int8_T TmpRTBAtFiltroPasaBaja2Inport_l;/* synthesized block */
+  int8_T TmpRTBAtFiltroPasaBaja2Inport_p;/* synthesized block */
+  int8_T TmpRTBAtFiltroPasaBajaInport1_R;/* synthesized block */
+  int8_T TmpRTBAtFiltroPasaBajaInport1_W;/* synthesized block */
+  int8_T POSITIVEEdge_SubsysRanBC;     /* '<S5>/POSITIVE Edge' */
+  int8_T NEGATIVEEdge_SubsysRanBC;     /* '<S5>/NEGATIVE Edge' */
+  int8_T TriggeredSubsystem_SubsysRanBC;/* '<S6>/Triggered Subsystem' */
+  boolean_T Memory_PreviousInput;      /* '<S5>/Memory' */
+  boolean_T POSITIVEEdge_MODE;         /* '<S5>/POSITIVE Edge' */
+  boolean_T NEGATIVEEdge_MODE;         /* '<S5>/NEGATIVE Edge' */
+};
+
+/* Continuous states (default storage) */
+struct X_control_vectorial_T {
+  real_T FiltroPasaBaja_CSTATE;        /* '<S21>/Filtro Pasa Baja' */
+  real_T FiltroPasaBaja1_CSTATE;       /* '<S21>/Filtro Pasa Baja1' */
+  real_T FiltroPasaBaja2_CSTATE;       /* '<S21>/Filtro Pasa Baja2' */
+  real_T Integrator_CSTATE;            /* '<S29>/Integrator' */
+  real_T Integrator_CSTATE_k;          /* '<S30>/Integrator' */
+};
+
+/* State derivatives (default storage) */
+struct XDot_control_vectorial_T {
+  real_T FiltroPasaBaja_CSTATE;        /* '<S21>/Filtro Pasa Baja' */
+  real_T FiltroPasaBaja1_CSTATE;       /* '<S21>/Filtro Pasa Baja1' */
+  real_T FiltroPasaBaja2_CSTATE;       /* '<S21>/Filtro Pasa Baja2' */
+  real_T Integrator_CSTATE;            /* '<S29>/Integrator' */
+  real_T Integrator_CSTATE_k;          /* '<S30>/Integrator' */
+};
+
+/* State disabled  */
+struct XDis_control_vectorial_T {
+  boolean_T FiltroPasaBaja_CSTATE;     /* '<S21>/Filtro Pasa Baja' */
+  boolean_T FiltroPasaBaja1_CSTATE;    /* '<S21>/Filtro Pasa Baja1' */
+  boolean_T FiltroPasaBaja2_CSTATE;    /* '<S21>/Filtro Pasa Baja2' */
+  boolean_T Integrator_CSTATE;         /* '<S29>/Integrator' */
+  boolean_T Integrator_CSTATE_k;       /* '<S30>/Integrator' */
+};
+
+/* Zero-crossing (trigger) state */
+struct PrevZCX_control_vectorial_T {
+  ZCSigState TriggeredSubsystem_Trig_ZCE;/* '<S6>/Triggered Subsystem' */
+};
+
+#ifndef ODE3_INTG
+#define ODE3_INTG
+
+/* ODE3 Integration Data */
+struct ODE3_IntgData {
+  real_T *y;                           /* output */
+  real_T *f[3];                        /* derivatives */
+};
+
+#endif
+
+/* Real-time Model Data Structure */
+struct tag_RTM_control_vectorial_T {
+  struct SimStruct_tag * *childSfunctions;
+  const char_T *errorStatus;
+  SS_SimMode simMode;
+  RTWSolverInfo solverInfo;
+  RTWSolverInfo *solverInfoPtr;
+  void *sfcnInfo;
+
+  /*
+   * NonInlinedSFcns:
+   * The following substructure contains information regarding
+   * non-inlined s-functions used in the model.
+   */
+  struct {
+    RTWSfcnInfo sfcnInfo;
+    time_T *taskTimePtrs[3];
+    SimStruct childSFunctions[3];
+    SimStruct *childSFunctionPtrs[3];
+    struct _ssBlkInfo2 blkInfo2[3];
+    struct _ssSFcnModelMethods2 methods2[3];
+    struct _ssSFcnModelMethods3 methods3[3];
+    struct _ssSFcnModelMethods4 methods4[3];
+    struct _ssStatesInfo2 statesInfo2[3];
+    ssPeriodicStatesInfo periodicStatesInfo[3];
+    struct _ssPortInfo2 inputOutputPortInfo2[3];
+    struct {
+      time_T sfcnPeriod[1];
+      time_T sfcnOffset[1];
+      int_T sfcnTsMap[1];
+      struct _ssPortOutputs outputPortInfo[2];
+      struct _ssOutPortUnit outputPortUnits[2];
+      struct _ssOutPortCoSimAttribute outputPortCoSimAttribute[2];
+      uint_T attribs[4];
+      mxArray *params[4];
+      struct _ssDWorkRecord dWork[1];
+      struct _ssDWorkAuxRecord dWorkAux[1];
+    } Sfcn0;
+
+    struct {
+      time_T sfcnPeriod[1];
+      time_T sfcnOffset[1];
+      int_T sfcnTsMap[1];
+      struct _ssPortInputs inputPortInfo[6];
+      struct _ssInPortUnit inputPortUnits[6];
+      struct _ssInPortCoSimAttribute inputPortCoSimAttribute[6];
+      uint_T attribs[6];
+      mxArray *params[6];
+      struct _ssDWorkRecord dWork[2];
+      struct _ssDWorkAuxRecord dWorkAux[2];
+    } Sfcn1;
+
+    struct {
+      time_T sfcnPeriod[1];
+      time_T sfcnOffset[1];
+      int_T sfcnTsMap[1];
+      struct _ssPortOutputs outputPortInfo[3];
+      struct _ssOutPortUnit outputPortUnits[3];
+      struct _ssOutPortCoSimAttribute outputPortCoSimAttribute[3];
+      uint_T attribs[9];
+      mxArray *params[9];
+      struct _ssDWorkRecord dWork[1];
+      struct _ssDWorkAuxRecord dWorkAux[1];
+    } Sfcn2;
+  } NonInlinedSFcns;
+
+  X_control_vectorial_T *contStates;
+  int_T *periodicContStateIndices;
+  real_T *periodicContStateRanges;
+  real_T *derivs;
+  XDis_control_vectorial_T *contStateDisabled;
+  boolean_T zCCacheNeedsReset;
+  boolean_T derivCacheNeedsReset;
+  boolean_T CTOutputIncnstWithState;
+  real_T odeY[5];
+  real_T odeF[3][5];
+  ODE3_IntgData intgData;
+
+  /*
+   * Sizes:
+   * The following substructure contains sizes information
+   * for many of the model attributes such as inputs, outputs,
+   * dwork, sample times, etc.
+   */
+  struct {
+    uint32_T options;
+    int_T numContStates;
+    int_T numPeriodicContStates;
+    int_T numU;
+    int_T numY;
+    int_T numSampTimes;
+    int_T numBlocks;
+    int_T numBlockIO;
+    int_T numBlockPrms;
+    int_T numDwork;
+    int_T numSFcnPrms;
+    int_T numSFcns;
+    int_T numIports;
+    int_T numOports;
+    int_T numNonSampZCs;
+    int_T sysDirFeedThru;
+    int_T rtwGenSfcn;
+  } Sizes;
+
+  /*
+   * Timing:
+   * The following substructure contains information regarding
+   * the timing information for the model.
+   */
+  struct {
+    time_T stepSize;
+    uint32_T clockTick0;
+    uint32_T clockTickH0;
+    time_T stepSize0;
+    uint32_T clockTick1;
+    uint32_T clockTickH1;
+    time_T stepSize1;
+    uint32_T clockTick2;
+    uint32_T clockTickH2;
+    time_T stepSize2;
+    struct {
+      uint8_T TID[3];
+      uint8_T cLimit[3];
+    } TaskCounters;
+
+    struct {
+      uint8_T TID1_2;
+    } RateInteraction;
+
+    time_T tStart;
+    time_T tFinal;
+    time_T timeOfLastOutput;
+    SimTimeStep simTimeStep;
+    boolean_T stopRequestedFlag;
+    time_T *sampleTimes;
+    time_T *offsetTimes;
+    int_T *sampleTimeTaskIDPtr;
+    int_T *sampleHits;
+    int_T *perTaskSampleHits;
+    time_T *t;
+    time_T sampleTimesArray[3];
+    time_T offsetTimesArray[3];
+    int_T sampleTimeTaskIDArray[3];
+    int_T sampleHitArray[3];
+    int_T perTaskSampleHitsArray[9];
+    time_T tArray[3];
+  } Timing;
+};
+
+/* Block signals (default storage) */
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern struct B_control_vectorial_T control_vectorial_B;
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/* Continuous states (default storage) */
+extern X_control_vectorial_T control_vectorial_X;
+
+/* Disabled states (default storage) */
+extern XDis_control_vectorial_T control_vectorial_XDis;
+
+/* Block states (default storage) */
+extern struct DW_control_vectorial_T control_vectorial_DW;
+
+/* Zero-crossing (trigger) state */
+extern PrevZCX_control_vectorial_T control_vectorial_PrevZCX;
+
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  /* Model entry point functions */
+  extern void control_vectorial_initialize(void);
+  extern void control_vectorial_step0(void);
+  extern void control_vectorial_step2(void);/* Sample time: [0.0001s, 0.0s] */
+  extern void control_vectorial_terminate(void);
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/* Real-time Model object */
+#ifdef __cplusplus
+
+extern "C"
+{
+
+#endif
+
+  extern RT_MODEL_control_vectorial_T *const control_vectorial_M;
+
+#ifdef __cplusplus
+
+}
+
+#endif
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Use the MATLAB hilite_system command to trace the generated code back
+ * to the model.  For example,
+ *
+ * hilite_system('<S3>')    - opens system 3
+ * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'control_vectorial'
+ * '<S1>'   : 'control_vectorial/Decodificador'
+ * '<S2>'   : 'control_vectorial/PWM Generator (2-Level)'
+ * '<S3>'   : 'control_vectorial/Speed FO control'
+ * '<S4>'   : 'control_vectorial/Decodificador/Edge Detector'
+ * '<S5>'   : 'control_vectorial/Decodificador/Edge Detector/Model'
+ * '<S6>'   : 'control_vectorial/Decodificador/Edge Detector/Model/Internal dirac generator'
+ * '<S7>'   : 'control_vectorial/Decodificador/Edge Detector/Model/NEGATIVE Edge'
+ * '<S8>'   : 'control_vectorial/Decodificador/Edge Detector/Model/POSITIVE Edge'
+ * '<S9>'   : 'control_vectorial/Decodificador/Edge Detector/Model/Internal dirac generator/Triggered Subsystem'
+ * '<S10>'  : 'control_vectorial/PWM Generator (2-Level)/Cr_MinMax'
+ * '<S11>'  : 'control_vectorial/PWM Generator (2-Level)/Modulator type'
+ * '<S12>'  : 'control_vectorial/PWM Generator (2-Level)/Reference signal'
+ * '<S13>'  : 'control_vectorial/PWM Generator (2-Level)/Sampling'
+ * '<S14>'  : 'control_vectorial/PWM Generator (2-Level)/Modulator type/One Three Phase Bridge'
+ * '<S15>'  : 'control_vectorial/PWM Generator (2-Level)/Reference signal/External'
+ * '<S16>'  : 'control_vectorial/PWM Generator (2-Level)/Sampling/Unsync Natural'
+ * '<S17>'  : 'control_vectorial/PWM Generator (2-Level)/Sampling/Unsync Natural/Unsync_NaturalSampling'
+ * '<S18>'  : 'control_vectorial/PWM Generator (2-Level)/Sampling/Unsync Natural/Unsync_NaturalSampling/Triangle Generator'
+ * '<S19>'  : 'control_vectorial/PWM Generator (2-Level)/Sampling/Unsync Natural/Unsync_NaturalSampling/Triangle Generator/Model'
+ * '<S20>'  : 'control_vectorial/Speed FO control/ABC->dq coordinate transform'
+ * '<S21>'  : 'control_vectorial/Speed FO control/Current first order filters'
+ * '<S22>'  : 'control_vectorial/Speed FO control/Current_loops'
+ * '<S23>'  : 'control_vectorial/Speed FO control/PMSM Current Reference Generator'
+ * '<S24>'  : 'control_vectorial/Speed FO control/PMSM Field-Weakening Controller1'
+ * '<S25>'  : 'control_vectorial/Speed FO control/Velocity Controller'
+ * '<S26>'  : 'control_vectorial/Speed FO control/dq->ABC coordinate transform'
+ * '<S27>'  : 'control_vectorial/Speed FO control/ABC->dq coordinate transform/ABC_DQ corrientes'
+ * '<S28>'  : 'control_vectorial/Speed FO control/ABC->dq coordinate transform/DQ->dq'
+ * '<S29>'  : 'control_vectorial/Speed FO control/Current_loops/PI_Idn'
+ * '<S30>'  : 'control_vectorial/Speed FO control/Current_loops/PI_Iqn'
+ * '<S31>'  : 'control_vectorial/Speed FO control/PMSM Current Reference Generator/Data Type Conversion Inherited2'
+ * '<S32>'  : 'control_vectorial/Speed FO control/PMSM Current Reference Generator/Torque limiter'
+ * '<S33>'  : 'control_vectorial/Speed FO control/PMSM Current Reference Generator/Torque limiter/Tq saturation'
+ * '<S34>'  : 'control_vectorial/Speed FO control/PMSM Field-Weakening Controller1/Cartesian to Polar'
+ * '<S35>'  : 'control_vectorial/Speed FO control/PMSM Field-Weakening Controller1/Modulation index'
+ * '<S36>'  : 'control_vectorial/Speed FO control/PMSM Field-Weakening Controller1/Polar to Cartesian'
+ * '<S37>'  : 'control_vectorial/Speed FO control/PMSM Field-Weakening Controller1/Modulation index/Prevent division by 0'
+ * '<S38>'  : 'control_vectorial/Speed FO control/Velocity Controller/Compare To Constant'
+ * '<S39>'  : 'control_vectorial/Speed FO control/Velocity Controller/Discrete PI Controller'
+ * '<S40>'  : 'control_vectorial/Speed FO control/dq->ABC coordinate transform/DQ_ABC'
+ * '<S41>'  : 'control_vectorial/Speed FO control/dq->ABC coordinate transform/dq->DQ'
+ */
+#endif                                 /* control_vectorial_h_ */

Control_Vectorial/real/control_vectorial_sg_rtw/control_vectorial_cal.cpp

@@ -0,0 +1,707 @@
+#include "control_vectorial_cal.h"
+#include "control_vectorial.h"
+
+/* Storage class 'PageSwitching' */
+control_vectorial_cal_type control_vectorial_cal_impl = {
+  /* Mask Parameter: VelocityController_CtrlType
+   * Referenced by: '<S25>/Constant'
+   */
+  1.0,
+
+  /* Mask Parameter: PMSMFieldWeakeningController1_K
+   * Referenced by: '<S24>/Gain1'
+   */
+  10.0,
+
+  /* Mask Parameter: VelocityController_Kaw_w
+   * Referenced by: '<S39>/Kaw'
+   */
+  1.0,
+
+  /* Mask Parameter: PMSMFieldWeakeningController1_o
+   * Referenced by: '<S24>/Gain'
+   */
+  100.0,
+
+  /* Mask Parameter: VelocityController_Ki_w
+   * Referenced by: '<S39>/Ki'
+   */
+  1.0,
+
+  /* Mask Parameter: VelocityController_Kp_w
+   * Referenced by: '<S39>/Kp'
+   */
+  1.0,
+
+  /* Mask Parameter: PWMGenerator2Level_MinMax
+   * Referenced by: '<S2>/Constant10'
+   */
+  { -1.0, 1.0 },
+
+  /* Mask Parameter: PMSMFieldWeakeningController1_M
+   * Referenced by: '<S24>/Modulation index threshold'
+   */
+  1.0,
+
+  /* Mask Parameter: CompareToConstant_const
+   * Referenced by: '<S38>/Constant'
+   */
+  2.5,
+
+  /* Mask Parameter: EdgeDetector_model
+   * Referenced by: '<S5>/Constant1'
+   */
+  2.0,
+
+  /* Mask Parameter: PMSMCurrentReferenceGenerator_p
+   * Referenced by: '<S23>/Tq--> iqRef'
+   */
+  0.0466027,
+
+  /* Mask Parameter: DiscretePIController_x0
+   * Referenced by: '<S39>/Discrete-Time Integrator'
+   */
+  0.0,
+
+  /* Mask Parameter: EdgeDetector_ic
+   * Referenced by: '<S5>/Memory'
+   */
+  false,
+
+  /* Expression: -1e6
+   * Referenced by: '<S9>/Out1'
+   */
+  -1.0E+6,
+
+  /* Expression: [1 0]
+   * Referenced by: '<S5>/pos. edge'
+   */
+  { 1.0, 0.0 },
+
+  /* Expression: [0 1]
+   * Referenced by: '<S5>/neg. edge'
+   */
+  { 0.0, 1.0 },
+
+  /* Expression: [1 1]
+   * Referenced by: '<S5>/either edge'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: -1
+   * Referenced by: '<S1>/Gain1'
+   */
+  -1.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Switch'
+   */
+  0.0,
+
+  /* Expression: 30/pi
+   * Referenced by: '<S23>/rad//s->rpm'
+   */
+  9.5492965855137211,
+
+  /* Expression: idMatrix
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 },
+
+  /* Expression: rpmVec
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { 0.0, 3000.0 },
+
+  /* Expression: TqVec
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { -100.0, 0.0, 100.0 },
+
+  /* Expression: VdcVec
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { 300.0, 350.0 },
+
+  /* Expression: iqMatrix
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 },
+
+  /* Expression: rpmVec
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { 0.0, 3000.0 },
+
+  /* Expression: TqVec
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { -100.0, 0.0, 100.0 },
+
+  /* Expression: VdcVec
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { 300.0, 350.0 },
+
+  /* Expression: 0.1
+   * Referenced by: '<S37>/Constant1'
+   */
+  0.1,
+
+  /* Expression: Kv_w
+   * Referenced by: '<S25>/Kv_w'
+   */
+  1.0,
+
+  /* Expression: -1
+   * Referenced by: '<S41>/Gain1'
+   */
+  -1.0,
+
+  /* Expression: 1
+   * Referenced by: '<S40>/Gain1'
+   */
+  1.0,
+
+  /* Expression: 1/2
+   * Referenced by: '<S40>/Gain2'
+   */
+  0.5,
+
+  /* Expression: sqrt(3)/2
+   * Referenced by: '<S40>/Gain'
+   */
+  0.8660254037844386,
+
+  /* Expression: 1/2
+   * Referenced by: '<S40>/Gain3'
+   */
+  0.5,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant2'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant3'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant5'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Constant'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant1'
+   */
+  0.0,
+
+  /* Computed Parameter: Encoder_P1_Size
+   * Referenced by: '<Root>/Encoder'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: id
+   * Referenced by: '<Root>/Encoder'
+   */
+  1.0,
+
+  /* Computed Parameter: Encoder_P2_Size
+   * Referenced by: '<Root>/Encoder'
+   */
+  { 1.0, 2.0 },
+
+  /* Expression: chan
+   * Referenced by: '<Root>/Encoder'
+   */
+  { 8.0, 9.0 },
+
+  /* Computed Parameter: Encoder_P3_Size
+   * Referenced by: '<Root>/Encoder'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: vectorizeOutput
+   * Referenced by: '<Root>/Encoder'
+   */
+  0.0,
+
+  /* Computed Parameter: Encoder_P4_Size
+   * Referenced by: '<Root>/Encoder'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: ts
+   * Referenced by: '<Root>/Encoder'
+   */
+  5.0E-5,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay4'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay3'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay1'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Switch2'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S1>/Delay2'
+   */
+  0.0,
+
+  /* Expression: -1
+   * Referenced by: '<S29>/-1'
+   */
+  -1.0,
+
+  /* Expression: -1
+   * Referenced by: '<S28>/Gain'
+   */
+  -1.0,
+
+  /* Computed Parameter: FiltroPasaBaja_A
+   * Referenced by: '<S21>/Filtro Pasa Baja'
+   */
+  -6283.1853071795858,
+
+  /* Computed Parameter: FiltroPasaBaja_C
+   * Referenced by: '<S21>/Filtro Pasa Baja'
+   */
+  6283.1853071795858,
+
+  /* Computed Parameter: FiltroPasaBaja1_A
+   * Referenced by: '<S21>/Filtro Pasa Baja1'
+   */
+  -6283.1853071795858,
+
+  /* Computed Parameter: FiltroPasaBaja1_C
+   * Referenced by: '<S21>/Filtro Pasa Baja1'
+   */
+  6283.1853071795858,
+
+  /* Expression: 0.5
+   * Referenced by: '<S27>/Gain1'
+   */
+  0.5,
+
+  /* Computed Parameter: FiltroPasaBaja2_A
+   * Referenced by: '<S21>/Filtro Pasa Baja2'
+   */
+  -6283.1853071795858,
+
+  /* Computed Parameter: FiltroPasaBaja2_C
+   * Referenced by: '<S21>/Filtro Pasa Baja2'
+   */
+  6283.1853071795858,
+
+  /* Expression: 0.5
+   * Referenced by: '<S27>/Gain2'
+   */
+  0.5,
+
+  /* Expression: 2/3
+   * Referenced by: '<S27>/Gain'
+   */
+  0.66666666666666663,
+
+  /* Expression: 1/sqrt(3)
+   * Referenced by: '<S27>/Gain4'
+   */
+  0.57735026918962584,
+
+  /* Expression: 0
+   * Referenced by: '<S23>/idRef'
+   */
+  0.0,
+
+  /* Expression: inf
+   * Referenced by: '<S32>/Saturation'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Constant'
+   */
+  0.0,
+
+  /* Expression: 2*pi/60
+   * Referenced by: '<Root>/Gain'
+   */
+  0.10471975511965977,
+
+  /* Expression: numZC_w
+   * Referenced by: '<S25>/Zero-cancellation  omega'
+   */
+  1.0,
+
+  /* Expression: denZC_w
+   * Referenced by: '<S25>/Zero-cancellation  omega'
+   */
+  1.0,
+
+  /* Expression: 0
+   * Referenced by: '<S25>/Zero-cancellation  omega'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S39>/Unit Delay'
+   */
+  0.0,
+
+  /* Computed Parameter: DiscreteTimeIntegrator_gainval
+   * Referenced by: '<S39>/Discrete-Time Integrator'
+   */
+  5.0E-5,
+
+  /* Expression: -1
+   * Referenced by: '<S32>/Sign Change'
+   */
+  -1.0,
+
+  /* Expression: EnableZDAC
+   * Referenced by: '<S23>/Constant'
+   */
+  1.0,
+
+  /* Expression: 0.5
+   * Referenced by: '<S23>/Switch'
+   */
+  0.5,
+
+  /* Expression: pi
+   * Referenced by: '<S24>/Constant'
+   */
+  3.1415926535897931,
+
+  /* Expression: 0
+   * Referenced by: '<S3>/Unit Delay'
+   */
+  0.0,
+
+  /* Expression: 0.1
+   * Referenced by: '<S37>/Switch'
+   */
+  0.1,
+
+  /* Expression: 0
+   * Referenced by: '<S24>/Unit Delay'
+   */
+  0.0,
+
+  /* Computed Parameter: DiscreteTimeIntegrator_gainva_k
+   * Referenced by: '<S24>/Discrete-Time Integrator'
+   */
+  5.0E-5,
+
+  /* Expression: 1
+   * Referenced by: '<S24>/Discrete-Time Integrator'
+   */
+  1.0,
+
+  /* Expression: 1
+   * Referenced by: '<S24>/Saturation'
+   */
+  1.0,
+
+  /* Expression: 0
+   * Referenced by: '<S24>/Saturation'
+   */
+  0.0,
+
+  /* Expression: pi
+   * Referenced by: '<S24>/Constant1'
+   */
+  3.1415926535897931,
+
+  /* Expression: 0
+   * Referenced by: '<S29>/Integrator'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S30>/Integrator'
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<Root>/Switch'
+   */
+  0.0,
+
+  /* Expression: sps.Delay
+   * Referenced by: '<S19>/Constant3'
+   */
+  0.000125,
+
+  /* Expression: sps.Period
+   * Referenced by: '<S19>/Constant1'
+   */
+  0.0005,
+
+  /* Expression: sps.Freq
+   * Referenced by: '<S19>/1\ib1'
+   */
+  2000.0,
+
+  /* Expression: [0 2 0]
+   * Referenced by: '<S19>/1-D Lookup Table'
+   */
+  { 0.0, 2.0, 0.0 },
+
+  /* Expression: [0 .5 1]
+   * Referenced by: '<S19>/1-D Lookup Table'
+   */
+  { 0.0, 0.5, 1.0 },
+
+  /* Expression: 1
+   * Referenced by: '<S19>/Constant2'
+   */
+  1.0,
+
+  /* Expression: 0.5
+   * Referenced by: '<S10>/Gain1'
+   */
+  0.5,
+
+  /* Computed Parameter: Digitaloutput_P1_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: id
+   * Referenced by: '<Root>/Digital output'
+   */
+  1.0,
+
+  /* Computed Parameter: Digitaloutput_P2_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 6.0 },
+
+  /* Expression: chan
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 2.0, 4.0, 5.0, 6.0, 7.0 },
+
+  /* Computed Parameter: Digitaloutput_P3_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: vectorizeInput
+   * Referenced by: '<Root>/Digital output'
+   */
+  0.0,
+
+  /* Computed Parameter: Digitaloutput_P4_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 6.0 },
+
+  /* Expression: reset
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 1.0, 1.0, 1.0, 1.0, 1.0 },
+
+  /* Computed Parameter: Digitaloutput_P5_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 6.0 },
+
+  /* Expression: init
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 },
+
+  /* Computed Parameter: Digitaloutput_P6_Size
+   * Referenced by: '<Root>/Digital output'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: ts
+   * Referenced by: '<Root>/Digital output'
+   */
+  -1.0,
+
+  /* Expression: eps
+   * Referenced by: '<S6>/Constant'
+   */
+  2.2204460492503131E-16,
+
+  /* Expression: 0
+   * Referenced by:
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by:
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by:
+   */
+  0.0,
+
+  /* Expression: 0
+   * Referenced by: '<S29>/C1'
+   */
+  0.0,
+
+  /* Expression: 0.05
+   * Referenced by: '<S29>/Switch'
+   */
+  0.05,
+
+  /* Expression: 0
+   * Referenced by: '<S30>/C1'
+   */
+  0.0,
+
+  /* Expression: 0.05
+   * Referenced by: '<S30>/Switch'
+   */
+  0.05,
+
+  /* Computed Parameter: CorrientesyPar_P1_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: id
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  1.0,
+
+  /* Computed Parameter: CorrientesyPar_P2_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 3.0 },
+
+  /* Expression: chan
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 2.0, 3.0 },
+
+  /* Computed Parameter: CorrientesyPar_P3_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: trigger
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  1.0,
+
+  /* Computed Parameter: CorrientesyPar_P4_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: range
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  2.0,
+
+  /* Computed Parameter: CorrientesyPar_P5_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: ts
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  0.0001,
+
+  /* Computed Parameter: CorrientesyPar_P6_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: p.AiTriggerMode
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  4.0,
+
+  /* Computed Parameter: CorrientesyPar_P7_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: p.AiClockDivider
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  7499.0,
+
+  /* Computed Parameter: CorrientesyPar_P8_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: parAiInternalSignal
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  1.0,
+
+  /* Computed Parameter: CorrientesyPar_P9_Size
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  { 1.0, 1.0 },
+
+  /* Expression: parAiDioTriggerChannel
+   * Referenced by: '<Root>/Corrientes y Par'
+   */
+  1.0,
+
+  /* Computed Parameter: LookupTableidreference_maxIndex
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { 1U, 2U, 1U },
+
+  /* Computed Parameter: LookupTableidreference_dimSizes
+   * Referenced by: '<S23>/Lookup Table id reference'
+   */
+  { 1U, 2U, 6U },
+
+  /* Computed Parameter: LookupTableiqreference_maxIndex
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { 1U, 2U, 1U },
+
+  /* Computed Parameter: LookupTableiqreference_dimSizes
+   * Referenced by: '<S23>/Lookup Table iq reference'
+   */
+  { 1U, 2U, 6U },
+
+  /* Computed Parameter: OUT_Y0
+   * Referenced by: '<S7>/OUT'
+   */
+  false,
+
+  /* Computed Parameter: OUT_Y0_l
+   * Referenced by: '<S8>/OUT'
+   */
+  false
+};
+
+control_vectorial_cal_type *control_vectorial_cal = &control_vectorial_cal_impl;

Control_Vectorial/real/control_vectorial_sg_rtw/control_vectorial_cal.h

@@ -0,0 +1,445 @@
+#ifndef control_vectorial_cal_h_
+#define control_vectorial_cal_h_
+#include "rtwtypes.h"
+
+/* Storage class 'PageSwitching', for system '<Root>' */
+struct control_vectorial_cal_type {
+  real_T VelocityController_CtrlType;
+                                  /* Mask Parameter: VelocityController_CtrlType
+                                   * Referenced by: '<S25>/Constant'
+                                   */
+  real_T PMSMFieldWeakeningController1_K;
+                              /* Mask Parameter: PMSMFieldWeakeningController1_K
+                               * Referenced by: '<S24>/Gain1'
+                               */
+  real_T VelocityController_Kaw_w;   /* Mask Parameter: VelocityController_Kaw_w
+                                      * Referenced by: '<S39>/Kaw'
+                                      */
+  real_T PMSMFieldWeakeningController1_o;
+                              /* Mask Parameter: PMSMFieldWeakeningController1_o
+                               * Referenced by: '<S24>/Gain'
+                               */
+  real_T VelocityController_Ki_w;     /* Mask Parameter: VelocityController_Ki_w
+                                       * Referenced by: '<S39>/Ki'
+                                       */
+  real_T VelocityController_Kp_w;     /* Mask Parameter: VelocityController_Kp_w
+                                       * Referenced by: '<S39>/Kp'
+                                       */
+  real_T PWMGenerator2Level_MinMax[2];
+                                    /* Mask Parameter: PWMGenerator2Level_MinMax
+                                     * Referenced by: '<S2>/Constant10'
+                                     */
+  real_T PMSMFieldWeakeningController1_M;
+                              /* Mask Parameter: PMSMFieldWeakeningController1_M
+                               * Referenced by: '<S24>/Modulation index threshold'
+                               */
+  real_T CompareToConstant_const;     /* Mask Parameter: CompareToConstant_const
+                                       * Referenced by: '<S38>/Constant'
+                                       */
+  real_T EdgeDetector_model;           /* Mask Parameter: EdgeDetector_model
+                                        * Referenced by: '<S5>/Constant1'
+                                        */
+  real_T PMSMCurrentReferenceGenerator_p;
+                              /* Mask Parameter: PMSMCurrentReferenceGenerator_p
+                               * Referenced by: '<S23>/Tq--> iqRef'
+                               */
+  real_T DiscretePIController_x0;     /* Mask Parameter: DiscretePIController_x0
+                                       * Referenced by: '<S39>/Discrete-Time Integrator'
+                                       */
+  boolean_T EdgeDetector_ic;           /* Mask Parameter: EdgeDetector_ic
+                                        * Referenced by: '<S5>/Memory'
+                                        */
+  real_T Out1_Y0;                      /* Expression: -1e6
+                                        * Referenced by: '<S9>/Out1'
+                                        */
+  real_T posedge_Value[2];             /* Expression: [1 0]
+                                        * Referenced by: '<S5>/pos. edge'
+                                        */
+  real_T negedge_Value[2];             /* Expression: [0 1]
+                                        * Referenced by: '<S5>/neg. edge'
+                                        */
+  real_T eitheredge_Value[2];          /* Expression: [1 1]
+                                        * Referenced by: '<S5>/either edge'
+                                        */
+  real_T Gain1_Gain;                   /* Expression: -1
+                                        * Referenced by: '<S1>/Gain1'
+                                        */
+  real_T Switch_Threshold;             /* Expression: 0
+                                        * Referenced by: '<S1>/Switch'
+                                        */
+  real_T radsrpm_Gain;                 /* Expression: 30/pi
+                                        * Referenced by: '<S23>/rad//s->rpm'
+                                        */
+  real_T LookupTableidreference_tableDat[12];/* Expression: idMatrix
+                                              * Referenced by: '<S23>/Lookup Table id reference'
+                                              */
+  real_T LookupTableidreference_bp01Data[2];/* Expression: rpmVec
+                                             * Referenced by: '<S23>/Lookup Table id reference'
+                                             */
+  real_T LookupTableidreference_bp02Data[3];/* Expression: TqVec
+                                             * Referenced by: '<S23>/Lookup Table id reference'
+                                             */
+  real_T LookupTableidreference_bp03Data[2];/* Expression: VdcVec
+                                             * Referenced by: '<S23>/Lookup Table id reference'
+                                             */
+  real_T LookupTableiqreference_tableDat[12];/* Expression: iqMatrix
+                                              * Referenced by: '<S23>/Lookup Table iq reference'
+                                              */
+  real_T LookupTableiqreference_bp01Data[2];/* Expression: rpmVec
+                                             * Referenced by: '<S23>/Lookup Table iq reference'
+                                             */
+  real_T LookupTableiqreference_bp02Data[3];/* Expression: TqVec
+                                             * Referenced by: '<S23>/Lookup Table iq reference'
+                                             */
+  real_T LookupTableiqreference_bp03Data[2];/* Expression: VdcVec
+                                             * Referenced by: '<S23>/Lookup Table iq reference'
+                                             */
+  real_T Constant1_Value;              /* Expression: 0.1
+                                        * Referenced by: '<S37>/Constant1'
+                                        */
+  real_T Kv_w_Gain;                    /* Expression: Kv_w
+                                        * Referenced by: '<S25>/Kv_w'
+                                        */
+  real_T Gain1_Gain_b;                 /* Expression: -1
+                                        * Referenced by: '<S41>/Gain1'
+                                        */
+  real_T Gain1_Gain_o;                 /* Expression: 1
+                                        * Referenced by: '<S40>/Gain1'
+                                        */
+  real_T Gain2_Gain;                   /* Expression: 1/2
+                                        * Referenced by: '<S40>/Gain2'
+                                        */
+  real_T Gain_Gain;                    /* Expression: sqrt(3)/2
+                                        * Referenced by: '<S40>/Gain'
+                                        */
+  real_T Gain3_Gain;                   /* Expression: 1/2
+                                        * Referenced by: '<S40>/Gain3'
+                                        */
+  real_T Constant2_Value;              /* Expression: 0
+                                        * Referenced by: '<Root>/Constant2'
+                                        */
+  real_T Constant3_Value;              /* Expression: 0
+                                        * Referenced by: '<Root>/Constant3'
+                                        */
+  real_T Constant5_Value;              /* Expression: 0
+                                        * Referenced by: '<Root>/Constant5'
+                                        */
+  real_T Constant_Value;               /* Expression: 0
+                                        * Referenced by: '<S1>/Constant'
+                                        */
+  real_T Constant1_Value_k;            /* Expression: 0
+                                        * Referenced by: '<Root>/Constant1'
+                                        */
+  real_T Encoder_P1_Size[2];           /* Computed Parameter: Encoder_P1_Size
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P1;                   /* Expression: id
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P2_Size[2];           /* Computed Parameter: Encoder_P2_Size
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P2[2];                /* Expression: chan
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P3_Size[2];           /* Computed Parameter: Encoder_P3_Size
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P3;                   /* Expression: vectorizeOutput
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P4_Size[2];           /* Computed Parameter: Encoder_P4_Size
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Encoder_P4;                   /* Expression: ts
+                                        * Referenced by: '<Root>/Encoder'
+                                        */
+  real_T Delay4_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay4'
+                                        */
+  real_T Delay3_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay3'
+                                        */
+  real_T Delay1_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay1'
+                                        */
+  real_T Switch2_Threshold;            /* Expression: 0
+                                        * Referenced by: '<S1>/Switch2'
+                                        */
+  real_T Delay2_InitialCondition;      /* Expression: 0
+                                        * Referenced by: '<S1>/Delay2'
+                                        */
+  real_T u_Gain;                       /* Expression: -1
+                                        * Referenced by: '<S29>/-1'
+                                        */
+  real_T Gain_Gain_h;                  /* Expression: -1
+                                        * Referenced by: '<S28>/Gain'
+                                        */
+  real_T FiltroPasaBaja_A;             /* Computed Parameter: FiltroPasaBaja_A
+                                        * Referenced by: '<S21>/Filtro Pasa Baja'
+                                        */
+  real_T FiltroPasaBaja_C;             /* Computed Parameter: FiltroPasaBaja_C
+                                        * Referenced by: '<S21>/Filtro Pasa Baja'
+                                        */
+  real_T FiltroPasaBaja1_A;            /* Computed Parameter: FiltroPasaBaja1_A
+                                        * Referenced by: '<S21>/Filtro Pasa Baja1'
+                                        */
+  real_T FiltroPasaBaja1_C;            /* Computed Parameter: FiltroPasaBaja1_C
+                                        * Referenced by: '<S21>/Filtro Pasa Baja1'
+                                        */
+  real_T Gain1_Gain_n;                 /* Expression: 0.5
+                                        * Referenced by: '<S27>/Gain1'
+                                        */
+  real_T FiltroPasaBaja2_A;            /* Computed Parameter: FiltroPasaBaja2_A
+                                        * Referenced by: '<S21>/Filtro Pasa Baja2'
+                                        */
+  real_T FiltroPasaBaja2_C;            /* Computed Parameter: FiltroPasaBaja2_C
+                                        * Referenced by: '<S21>/Filtro Pasa Baja2'
+                                        */
+  real_T Gain2_Gain_e;                 /* Expression: 0.5
+                                        * Referenced by: '<S27>/Gain2'
+                                        */
+  real_T Gain_Gain_f;                  /* Expression: 2/3
+                                        * Referenced by: '<S27>/Gain'
+                                        */
+  real_T Gain4_Gain;                   /* Expression: 1/sqrt(3)
+                                        * Referenced by: '<S27>/Gain4'
+                                        */
+  real_T idRef_Value;                  /* Expression: 0
+                                        * Referenced by: '<S23>/idRef'
+                                        */
+  real_T Saturation_UpperSat;          /* Expression: inf
+                                        * Referenced by: '<S32>/Saturation'
+                                        */
+  real_T Constant_Value_d;             /* Expression: 0
+                                        * Referenced by: '<Root>/Constant'
+                                        */
+  real_T Gain_Gain_p;                  /* Expression: 2*pi/60
+                                        * Referenced by: '<Root>/Gain'
+                                        */
+  real_T Zerocancellationomega_NumCoef;/* Expression: numZC_w
+                                        * Referenced by: '<S25>/Zero-cancellation  omega'
+                                        */
+  real_T Zerocancellationomega_DenCoef;/* Expression: denZC_w
+                                        * Referenced by: '<S25>/Zero-cancellation  omega'
+                                        */
+  real_T Zerocancellationomega_InitialSt;/* Expression: 0
+                                          * Referenced by: '<S25>/Zero-cancellation  omega'
+                                          */
+  real_T UnitDelay_InitialCondition;   /* Expression: 0
+                                        * Referenced by: '<S39>/Unit Delay'
+                                        */
+  real_T DiscreteTimeIntegrator_gainval;
+                           /* Computed Parameter: DiscreteTimeIntegrator_gainval
+                            * Referenced by: '<S39>/Discrete-Time Integrator'
+                            */
+  real_T SignChange_Gain;              /* Expression: -1
+                                        * Referenced by: '<S32>/Sign Change'
+                                        */
+  real_T Constant_Value_k;             /* Expression: EnableZDAC
+                                        * Referenced by: '<S23>/Constant'
+                                        */
+  real_T Switch_Threshold_g;           /* Expression: 0.5
+                                        * Referenced by: '<S23>/Switch'
+                                        */
+  real_T Constant_Value_h;             /* Expression: pi
+                                        * Referenced by: '<S24>/Constant'
+                                        */
+  real_T UnitDelay_InitialCondition_i; /* Expression: 0
+                                        * Referenced by: '<S3>/Unit Delay'
+                                        */
+  real_T Switch_Threshold_e;           /* Expression: 0.1
+                                        * Referenced by: '<S37>/Switch'
+                                        */
+  real_T UnitDelay_InitialCondition_g; /* Expression: 0
+                                        * Referenced by: '<S24>/Unit Delay'
+                                        */
+  real_T DiscreteTimeIntegrator_gainva_k;
+                          /* Computed Parameter: DiscreteTimeIntegrator_gainva_k
+                           * Referenced by: '<S24>/Discrete-Time Integrator'
+                           */
+  real_T DiscreteTimeIntegrator_IC;    /* Expression: 1
+                                        * Referenced by: '<S24>/Discrete-Time Integrator'
+                                        */
+  real_T Saturation_UpperSat_g;        /* Expression: 1
+                                        * Referenced by: '<S24>/Saturation'
+                                        */
+  real_T Saturation_LowerSat;          /* Expression: 0
+                                        * Referenced by: '<S24>/Saturation'
+                                        */
+  real_T Constant1_Value_h;            /* Expression: pi
+                                        * Referenced by: '<S24>/Constant1'
+                                        */
+  real_T Integrator_IC;                /* Expression: 0
+                                        * Referenced by: '<S29>/Integrator'
+                                        */
+  real_T Integrator_IC_l;              /* Expression: 0
+                                        * Referenced by: '<S30>/Integrator'
+                                        */
+  real_T Switch_Threshold_l;           /* Expression: 0
+                                        * Referenced by: '<Root>/Switch'
+                                        */
+  real_T Constant3_Value_m;            /* Expression: sps.Delay
+                                        * Referenced by: '<S19>/Constant3'
+                                        */
+  real_T Constant1_Value_e;            /* Expression: sps.Period
+                                        * Referenced by: '<S19>/Constant1'
+                                        */
+  real_T uib1_Gain;                    /* Expression: sps.Freq
+                                        * Referenced by: '<S19>/1\ib1'
+                                        */
+  real_T uDLookupTable_tableData[3];   /* Expression: [0 2 0]
+                                        * Referenced by: '<S19>/1-D Lookup Table'
+                                        */
+  real_T uDLookupTable_bp01Data[3];    /* Expression: [0 .5 1]
+                                        * Referenced by: '<S19>/1-D Lookup Table'
+                                        */
+  real_T Constant2_Value_p;            /* Expression: 1
+                                        * Referenced by: '<S19>/Constant2'
+                                        */
+  real_T Gain1_Gain_h;                 /* Expression: 0.5
+                                        * Referenced by: '<S10>/Gain1'
+                                        */
+  real_T Digitaloutput_P1_Size[2];  /* Computed Parameter: Digitaloutput_P1_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P1;             /* Expression: id
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Digitaloutput_P2_Size[2];  /* Computed Parameter: Digitaloutput_P2_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P2[6];          /* Expression: chan
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Digitaloutput_P3_Size[2];  /* Computed Parameter: Digitaloutput_P3_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P3;             /* Expression: vectorizeInput
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Digitaloutput_P4_Size[2];  /* Computed Parameter: Digitaloutput_P4_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P4[6];          /* Expression: reset
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Digitaloutput_P5_Size[2];  /* Computed Parameter: Digitaloutput_P5_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P5[6];          /* Expression: init
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Digitaloutput_P6_Size[2];  /* Computed Parameter: Digitaloutput_P6_Size
+                                     * Referenced by: '<Root>/Digital output'
+                                     */
+  real_T Digitaloutput_P6;             /* Expression: ts
+                                        * Referenced by: '<Root>/Digital output'
+                                        */
+  real_T Constant_Value_p;             /* Expression: eps
+                                        * Referenced by: '<S6>/Constant'
+                                        */
+  real_T TmpRTBAtFiltroPasaBaja1Inport1_;/* Expression: 0
+                                          * Referenced by:
+                                          */
+  real_T TmpRTBAtFiltroPasaBaja2Inport1_;/* Expression: 0
+                                          * Referenced by:
+                                          */
+  real_T TmpRTBAtFiltroPasaBajaInport1_I;/* Expression: 0
+                                          * Referenced by:
+                                          */
+  real_T C1_Value;                     /* Expression: 0
+                                        * Referenced by: '<S29>/C1'
+                                        */
+  real_T Switch_Threshold_d;           /* Expression: 0.05
+                                        * Referenced by: '<S29>/Switch'
+                                        */
+  real_T C1_Value_p;                   /* Expression: 0
+                                        * Referenced by: '<S30>/C1'
+                                        */
+  real_T Switch_Threshold_ed;          /* Expression: 0.05
+                                        * Referenced by: '<S30>/Switch'
+                                        */
+  real_T CorrientesyPar_P1_Size[2];/* Computed Parameter: CorrientesyPar_P1_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P1;            /* Expression: id
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P2_Size[2];/* Computed Parameter: CorrientesyPar_P2_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P2[3];         /* Expression: chan
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P3_Size[2];/* Computed Parameter: CorrientesyPar_P3_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P3;            /* Expression: trigger
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P4_Size[2];/* Computed Parameter: CorrientesyPar_P4_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P4;            /* Expression: range
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P5_Size[2];/* Computed Parameter: CorrientesyPar_P5_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P5;            /* Expression: ts
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P6_Size[2];/* Computed Parameter: CorrientesyPar_P6_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P6;            /* Expression: p.AiTriggerMode
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P7_Size[2];/* Computed Parameter: CorrientesyPar_P7_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P7;            /* Expression: p.AiClockDivider
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P8_Size[2];/* Computed Parameter: CorrientesyPar_P8_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P8;            /* Expression: parAiInternalSignal
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  real_T CorrientesyPar_P9_Size[2];/* Computed Parameter: CorrientesyPar_P9_Size
+                                    * Referenced by: '<Root>/Corrientes y Par'
+                                    */
+  real_T CorrientesyPar_P9;            /* Expression: parAiDioTriggerChannel
+                                        * Referenced by: '<Root>/Corrientes y Par'
+                                        */
+  uint32_T LookupTableidreference_maxIndex[3];
+                          /* Computed Parameter: LookupTableidreference_maxIndex
+                           * Referenced by: '<S23>/Lookup Table id reference'
+                           */
+  uint32_T LookupTableidreference_dimSizes[3];
+                          /* Computed Parameter: LookupTableidreference_dimSizes
+                           * Referenced by: '<S23>/Lookup Table id reference'
+                           */
+  uint32_T LookupTableiqreference_maxIndex[3];
+                          /* Computed Parameter: LookupTableiqreference_maxIndex
+                           * Referenced by: '<S23>/Lookup Table iq reference'
+                           */
+  uint32_T LookupTableiqreference_dimSizes[3];
+                          /* Computed Parameter: LookupTableiqreference_dimSizes
+                           * Referenced by: '<S23>/Lookup Table iq reference'
+                           */
+  boolean_T OUT_Y0;                    /* Computed Parameter: OUT_Y0
+                                        * Referenced by: '<S7>/OUT'
+                                        */
+  boolean_T OUT_Y0_l;                  /* Computed Parameter: OUT_Y0_l
+                                        * Referenced by: '<S8>/OUT'
+                                        */
+};
+
+/* Storage class 'PageSwitching' */
+extern control_vectorial_cal_type control_vectorial_cal_impl;
+extern control_vectorial_cal_type *control_vectorial_cal;
+
+#endif                                 /* control_vectorial_cal_h_ */

Control_Vectorial/real/control_vectorial_sg_rtw/control_vectorial_private.h

@@ -0,0 +1,64 @@
+/*
+ * control_vectorial_private.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "control_vectorial".
+ *
+ * Model version              : 1.33
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Mon Jul 28 10:28:03 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef control_vectorial_private_h_
+#define control_vectorial_private_h_
+#include "rtwtypes.h"
+#include "multiword_types.h"
+#include "zero_crossing_types.h"
+#include "control_vectorial_types.h"
+#include "control_vectorial.h"
+
+/* Private macros used by the generated code to access rtModel */
+#ifndef rtmIsMajorTimeStep
+#define rtmIsMajorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MAJOR_TIME_STEP)
+#endif
+
+#ifndef rtmIsMinorTimeStep
+#define rtmIsMinorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MINOR_TIME_STEP)
+#endif
+
+#ifndef rtmSetTFinal
+#define rtmSetTFinal(rtm, val)         ((rtm)->Timing.tFinal = (val))
+#endif
+
+#ifndef rtmSetTPtr
+#define rtmSetTPtr(rtm, val)           ((rtm)->Timing.t = (val))
+#endif
+
+extern real_T rt_hypotd_snf(real_T u0, real_T u1);
+extern real_T rt_atan2d_snf(real_T u0, real_T u1);
+extern real_T rt_remd_snf(real_T u0, real_T u1);
+extern real_T look1_pbinlxpw(real_T u0, const real_T bp0[], const real_T table[],
+  uint32_T prevIndex[], uint32_T maxIndex);
+extern uint32_T plook_binx(real_T u, const real_T bp[], uint32_T maxIndex,
+  real_T *fraction);
+extern real_T intrp3d_l_pw(const uint32_T bpIndex[], const real_T frac[], const
+  real_T table[], const uint32_T stride[]);
+extern uint32_T binsearch_u32d(real_T u, const real_T bp[], uint32_T startIndex,
+  uint32_T maxIndex);
+extern "C" void sg_fpga_di_sf_a2(SimStruct *rts);
+extern "C" void sg_fpga_do_sf_a2(SimStruct *rts);
+extern "C" void sg_fpga_IO397_ad(SimStruct *rts);
+
+/* private model entry point functions */
+extern void control_vectorial_derivatives(void);
+
+#endif                                 /* control_vectorial_private_h_ */

Control_Vectorial/real/control_vectorial_sg_rtw/control_vectorial_types.h

@@ -0,0 +1,27 @@
+/*
+ * control_vectorial_types.h
+ *
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * Code generation for model "control_vectorial".
+ *
+ * Model version              : 1.33
+ * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
+ * C++ source code generated on : Mon Jul 28 10:28:03 2025
+ *
+ * Target selection: speedgoat.tlc
+ * Note: GRT includes extra infrastructure and instrumentation for prototyping
+ * Embedded hardware selection: Intel->x86-64 (Linux 64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef control_vectorial_types_h_
+#define control_vectorial_types_h_
+
+/* Forward declaration for rtModel */
+typedef struct tag_RTM_control_vectorial_T RT_MODEL_control_vectorial_T;
+
+#endif                                 /* control_vectorial_types_h_ */

Control_Vectorial/real/control_vectorial_sg_rtw/instrumented/control_vectorial.bat

@@ -0,0 +1,15 @@
+
+call "%SLREALTIME_QNX_SP_ROOT%\%SLREALTIME_QNX_VERSION%\qnxsdp-env.bat"
+
+cd .
+
+chcp 1252
+
+if "%1"=="" (make  -f control_vectorial.mk all) else (make  -f control_vectorial.mk %1)
+@if errorlevel 1 goto error_exit
+
+exit /B 0
+
+:error_exit
+echo The make command returned an error of %errorlevel%
+exit /B 1

Control_Vectorial/real/control_vectorial_sg_rtw/instrumented/control_vectorial.mk

@@ -0,0 +1,531 @@
+###########################################################################
+## Makefile generated for component 'control_vectorial'. 
+## 
+## Makefile     : control_vectorial.mk
+## Generated on : Mon Jul 28 10:28:19 2025
+## Final product: $(START_DIR)/control_vectorial_sg_rtw/control_vectorial
+## Product type : executable
+## 
+###########################################################################
+
+###########################################################################
+## MACROS
+###########################################################################
+
+# Macro Descriptions:
+# PRODUCT_NAME            Name of the system to build
+# MAKEFILE                Name of this makefile
+
+PRODUCT_NAME              = control_vectorial
+MAKEFILE                  = control_vectorial.mk
+MATLAB_ROOT               = C:/PROGRA~1/MATLAB/R2024b
+MATLAB_BIN                = C:/PROGRA~1/MATLAB/R2024b/bin
+MATLAB_ARCH_BIN           = $(MATLAB_BIN)/win64
+START_DIR                 = C:/Users/OSUESC~1/Desktop/ALUMNO~1/control/CONTRO~1/real
+SOLVER                    = 
+SOLVER_OBJ                = 
+CLASSIC_INTERFACE         = 0
+TGT_FCN_LIB               = ISO_C++
+MODEL_HAS_DYNAMICALLY_LOADED_SFCNS = 0
+RELATIVE_PATH_TO_ANCHOR   = ../..
+C_STANDARD_OPTS           = 
+CPP_STANDARD_OPTS         = 
+
+###########################################################################
+## TOOLCHAIN SPECIFICATIONS
+###########################################################################
+
+# Toolchain Name:          Simulink Real-Time Toolchain
+# Supported Version(s):    
+# ToolchainInfo Version:   2024b
+# Specification Revision:  1.0
+# 
+#-------------------------------------------
+# Macros assumed to be defined elsewhere
+#-------------------------------------------
+
+# SLREALTIME_QNX_SP_ROOT
+# SLREALTIME_QNX_VERSION
+
+#-----------
+# MACROS
+#-----------
+
+QCC_TARGET             = gcc_ntox86_64
+
+TOOLCHAIN_SRCS = 
+TOOLCHAIN_INCS = 
+TOOLCHAIN_LIBS = -L$(MATLAB_ROOT)/toolbox/slrealtime/target/win64/target/lib -ltraceparser -lpps -lslrealtime_kernel -lslrealtime_platform -lslrealtime_rtps -lsocket -lboost_system -lboost_log -lpci -lopenblas -lpcap
+
+#------------------------
+# BUILD TOOL COMMANDS
+#------------------------
+
+# C Compiler: QNX C Compiler
+CC = qcc
+
+# Linker: QCC Linker
+LD = q++
+
+# C++ Compiler: QNX C++ Compiler
+CPP = q++
+
+# C++ Linker: QCC C++ Linker
+CPP_LD = q++
+
+# Archiver: QNX Archiver
+AR = ntox86_64-gcc-ar
+
+# Builder: GMAKE Utility
+MAKE = make
+
+
+#-------------------------
+# Directives/Utilities
+#-------------------------
+
+CDEBUG              = -g -O0 -finstrument-functions
+C_OUTPUT_FLAG       = -o
+LDDEBUG             = -g
+OUTPUT_FLAG         = -o
+CPPDEBUG            = -g -O0 -finstrument-functions
+CPP_OUTPUT_FLAG     = -o
+CPPLDDEBUG          = -g
+OUTPUT_FLAG         = -o
+ARDEBUG             =
+STATICLIB_OUTPUT_FLAG =
+RM                  = @del /F
+ECHO                = @echo
+MV                  = @move
+RUN                 =
+
+#--------------------------------------
+# "Faster Runs" Build Configuration
+#--------------------------------------
+
+ARFLAGS              = ruvs
+CFLAGS               = -c -V$(QCC_TARGET) -g \
+                       -O2 -fwrapv
+CPPFLAGS             = -c -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++ \
+                       -O2 -fwrapv
+CPP_LDFLAGS          = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
+CPP_SHAREDLIB_LDFLAGS  = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
+LDFLAGS              = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
+MAKE_FLAGS           = -f $(MAKEFILE)
+SHAREDLIB_LDFLAGS    = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
+
+
+
+###########################################################################
+## OUTPUT INFO
+###########################################################################
+
+PRODUCT = $(START_DIR)/control_vectorial_sg_rtw/control_vectorial
+PRODUCT_TYPE = "executable"
+BUILD_TYPE = "Top-Level Standalone Executable"
+
+###########################################################################
+## INCLUDE PATHS
+###########################################################################
+
+INCLUDES_BUILDINFO = -I$(START_DIR) -I$(START_DIR)/control_vectorial_sg_rtw -I$(MATLAB_ROOT)/toolbox/slrealtime/simulink/blocks/dist/include -I$(MATLAB_ROOT)/toolbox/slrealtime/target/kernel/dist/include -I$(MATLAB_ROOT)/extern/include -I$(MATLAB_ROOT)/simulink/include -I$(MATLAB_ROOT)/rtw/c/src -I$(MATLAB_ROOT)/rtw/c/src/ext_mode/common -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1 -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/include -IC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/include -I$(START_DIR)/control_vectorial_sg_rtw/instrumented
+
+INCLUDES = $(INCLUDES_BUILDINFO)
+
+###########################################################################
+## DEFINES
+###########################################################################
+
+DEFINES_ = -DSIMULINK_REAL_TIME -D_QNX_SOURCE
+DEFINES_BUILD_ARGS = -DCLASSIC_INTERFACE=0 -DALLOCATIONFCN=0 -DEXT_MODE=1 -DMAT_FILE=0 -DONESTEPFCN=1 -DTERMFCN=1 -DMULTI_INSTANCE_CODE=0 -DINTEGER_CODE=0 -DMT=1
+DEFINES_CUSTOM = 
+DEFINES_OPTS = -DTID01EQ=1
+DEFINES_STANDARD = -DMODEL=control_vectorial -DNUMST=3 -DNCSTATES=5 -DHAVESTDIO -DRT -DUSE_RTMODEL
+
+DEFINES = $(DEFINES_) $(DEFINES_BUILD_ARGS) $(DEFINES_CUSTOM) $(DEFINES_OPTS) $(DEFINES_STANDARD)
+
+###########################################################################
+## SOURCE FILES
+###########################################################################
+
+SRCS = $(MATLAB_ROOT)/rtw/c/src/rt_matrx.c $(MATLAB_ROOT)/rtw/c/src/rt_printf.c $(START_DIR)/control_vectorial_sg_rtw/control_vectorial.cpp $(START_DIR)/control_vectorial_sg_rtw/control_vectorial_cal.cpp $(START_DIR)/control_vectorial_sg_rtw/rtGetInf.cpp $(START_DIR)/control_vectorial_sg_rtw/rtGetNaN.cpp $(START_DIR)/control_vectorial_sg_rtw/rt_nonfinite.cpp $(START_DIR)/control_vectorial_sg_rtw/rtmodel.cpp $(START_DIR)/control_vectorial_sg_rtw/slrealtime_datatype_ground.cpp $(START_DIR)/control_vectorial_sg_rtw/rte_control_vectorial_parameters.cpp $(START_DIR)/control_vectorial_sg_rtw/main.cpp C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/sg_fpga_IO397_ad.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_di_sf_a2.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_do_sf_a2.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io30x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_scatter_gather_dma.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io39x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io31x_io32x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io33x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io36x_setup_util.c C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_util.c $(START_DIR)/control_vectorial_sg_rtw/sg_early_init.cpp host_timer_x86.c slrealtime_code_profiling_utility_functions.cpp
+
+ALL_SRCS = $(SRCS)
+
+###########################################################################
+## OBJECTS
+###########################################################################
+
+OBJS = rt_matrx.o rt_printf.o control_vectorial.o control_vectorial_cal.o rtGetInf.o rtGetNaN.o rt_nonfinite.o rtmodel.o slrealtime_datatype_ground.o rte_control_vectorial_parameters.o main.o sg_fpga_IO397_ad.o sg_fpga_di_sf_a2.o sg_fpga_do_sf_a2.o sg_fpga_io30x_setup_util.o sg_fpga_io3xx_scatter_gather_dma.o sg_fpga_io39x_setup_util.o sg_fpga_io31x_io32x_setup_util.o sg_fpga_io33x_setup_util.o sg_fpga_setup_util.o sg_fpga_io36x_setup_util.o sg_fpga_io3xx_util.o sg_early_init.o host_timer_x86.o slrealtime_code_profiling_utility_functions.o
+
+ALL_OBJS = $(OBJS)
+
+###########################################################################
+## PREBUILT OBJECT FILES
+###########################################################################
+
+PREBUILT_OBJS = 
+
+###########################################################################
+## LIBRARIES
+###########################################################################
+
+LIBS = 
+
+###########################################################################
+## SYSTEM LIBRARIES
+###########################################################################
+
+SYSTEM_LIBS = 
+
+###########################################################################
+## ADDITIONAL TOOLCHAIN FLAGS
+###########################################################################
+
+#---------------
+# C Compiler
+#---------------
+
+CFLAGS_BASIC = $(DEFINES) $(INCLUDES)
+
+CFLAGS += $(CFLAGS_BASIC)
+
+#-----------------
+# C++ Compiler
+#-----------------
+
+CPPFLAGS_BASIC = $(DEFINES) $(INCLUDES)
+
+CPPFLAGS += $(CPPFLAGS_BASIC)
+
+#---------------
+# C++ Linker
+#---------------
+
+CPP_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+CPP_LDFLAGS += $(CPP_LDFLAGS_)
+
+#------------------------------
+# C++ Shared Library Linker
+#------------------------------
+
+CPP_SHAREDLIB_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+CPP_SHAREDLIB_LDFLAGS += $(CPP_SHAREDLIB_LDFLAGS_)
+
+#-----------
+# Linker
+#-----------
+
+LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+LDFLAGS += $(LDFLAGS_)
+
+#--------------------------
+# Shared Library Linker
+#--------------------------
+
+SHAREDLIB_LDFLAGS_ = -lsg_qnx710_x86_64 -LC:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/common/libsg
+
+SHAREDLIB_LDFLAGS += $(SHAREDLIB_LDFLAGS_)
+
+###########################################################################
+## INLINED COMMANDS
+###########################################################################
+
+###########################################################################
+## PHONY TARGETS
+###########################################################################
+
+.PHONY : all build buildobj clean info prebuild
+
+
+all : build
+	@echo "### Successfully generated all binary outputs."
+
+
+build : prebuild $(PRODUCT)
+
+
+buildobj : prebuild $(OBJS) $(PREBUILT_OBJS)
+	@echo "### Successfully generated all binary outputs."
+
+
+prebuild : 
+
+
+###########################################################################
+## FINAL TARGET
+###########################################################################
+
+#-------------------------------------------
+# Create a standalone executable            
+#-------------------------------------------
+
+$(PRODUCT) : $(OBJS) $(PREBUILT_OBJS)
+	@echo "### Creating standalone executable "$(PRODUCT)" ..."
+	$(CPP_LD) $(CPP_LDFLAGS) -o $(PRODUCT) $(OBJS) $(SYSTEM_LIBS) $(TOOLCHAIN_LIBS)
+	@echo "### Created: $(PRODUCT)"
+
+
+###########################################################################
+## INTERMEDIATE TARGETS
+###########################################################################
+
+#---------------------
+# SOURCE-TO-OBJECT
+#---------------------
+
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/control_vectorial_sg_rtw/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/control_vectorial_sg_rtw/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/simulink/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/simulink/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/simulink/blocks/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/simulink/blocks/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : ../%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : ../%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/coder/profile/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(MATLAB_ROOT)/toolbox/coder/profile/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/control_vectorial_sg_rtw/instrumented/%.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+%.o : $(START_DIR)/control_vectorial_sg_rtw/instrumented/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rt_matrx.o : $(MATLAB_ROOT)/rtw/c/src/rt_matrx.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+rt_printf.o : $(MATLAB_ROOT)/rtw/c/src/rt_printf.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+control_vectorial.o : $(START_DIR)/control_vectorial_sg_rtw/control_vectorial.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+control_vectorial_cal.o : $(START_DIR)/control_vectorial_sg_rtw/control_vectorial_cal.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rtGetInf.o : $(START_DIR)/control_vectorial_sg_rtw/rtGetInf.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rtGetNaN.o : $(START_DIR)/control_vectorial_sg_rtw/rtGetNaN.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rt_nonfinite.o : $(START_DIR)/control_vectorial_sg_rtw/rt_nonfinite.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rtmodel.o : $(START_DIR)/control_vectorial_sg_rtw/rtmodel.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+slrealtime_datatype_ground.o : $(START_DIR)/control_vectorial_sg_rtw/slrealtime_datatype_ground.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+rte_control_vectorial_parameters.o : $(START_DIR)/control_vectorial_sg_rtw/rte_control_vectorial_parameters.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+main.o : $(START_DIR)/control_vectorial_sg_rtw/main.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+sg_fpga_IO397_ad.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/analog/sg_fpga_IO397_ad.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_di_sf_a2.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_di_sf_a2.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_do_sf_a2.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/dio/sg_fpga_do_sf_a2.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io30x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io30x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io3xx_scatter_gather_dma.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_scatter_gather_dma.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io39x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io39x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io31x_io32x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io31x_io32x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io33x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io33x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io36x_setup_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io36x_setup_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_fpga_io3xx_util.o : C:/ProgramData/Speedgoat/speedgoatlib/R2024b/9.9.1.1/sg_blocks/fpga/setup/src/sg_fpga_io3xx_util.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+
+sg_early_init.o : $(START_DIR)/control_vectorial_sg_rtw/sg_early_init.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
+
+
+###########################################################################
+## DEPENDENCIES
+###########################################################################
+
+$(ALL_OBJS) : rtw_proj.tmw $(MAKEFILE)
+
+
+###########################################################################
+## MISCELLANEOUS TARGETS
+###########################################################################
+
+info : 
+	@echo "### PRODUCT = $(PRODUCT)"
+	@echo "### PRODUCT_TYPE = $(PRODUCT_TYPE)"
+	@echo "### BUILD_TYPE = $(BUILD_TYPE)"
+	@echo "### INCLUDES = $(INCLUDES)"
+	@echo "### DEFINES = $(DEFINES)"
+	@echo "### ALL_SRCS = $(ALL_SRCS)"
+	@echo "### ALL_OBJS = $(ALL_OBJS)"
+	@echo "### LIBS = $(LIBS)"
+	@echo "### MODELREF_LIBS = $(MODELREF_LIBS)"
+	@echo "### SYSTEM_LIBS = $(SYSTEM_LIBS)"
+	@echo "### TOOLCHAIN_LIBS = $(TOOLCHAIN_LIBS)"
+	@echo "### CFLAGS = $(CFLAGS)"
+	@echo "### LDFLAGS = $(LDFLAGS)"
+	@echo "### SHAREDLIB_LDFLAGS = $(SHAREDLIB_LDFLAGS)"
+	@echo "### CPPFLAGS = $(CPPFLAGS)"
+	@echo "### CPP_LDFLAGS = $(CPP_LDFLAGS)"
+	@echo "### CPP_SHAREDLIB_LDFLAGS = $(CPP_SHAREDLIB_LDFLAGS)"
+	@echo "### ARFLAGS = $(ARFLAGS)"
+	@echo "### MAKE_FLAGS = $(MAKE_FLAGS)"
+
+
+clean : 
+	$(ECHO) "### Deleting all derived files ..."
+	$(RM) $(subst /,\,$(PRODUCT))
+	$(RM) $(subst /,\,$(ALL_OBJS))
+	$(ECHO) "### Deleted all derived files."
+
+