/* * SquareDebug.cpp * * Academic License - for use in teaching, academic research, and meeting * course requirements at degree granting institutions only. Not for * government, commercial, or other organizational use. * * Code generation for model "SquareDebug". * * Model version : 1.1 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * C++ source code generated on : Thu Oct 10 10:54:01 2024 * * Target selection: speedgoat.tlc * Note: GRT includes extra infrastructure and instrumentation for prototyping * Embedded hardware selection: Intel->x86-64 (Linux 64) * Code generation objectives: Unspecified * Validation result: Not run */ #include "SquareDebug.h" #include "SquareDebug_cal.h" #include "rtwtypes.h" #include "SquareDebug_private.h" #include extern "C" { #include "rt_nonfinite.h" } /* Block signals (default storage) */ B_SquareDebug_T SquareDebug_B; /* Block states (default storage) */ DW_SquareDebug_T SquareDebug_DW; /* Real-time model */ RT_MODEL_SquareDebug_T SquareDebug_M_ = RT_MODEL_SquareDebug_T(); RT_MODEL_SquareDebug_T *const SquareDebug_M = &SquareDebug_M_; /* Model step function for TID0 */ void SquareDebug_step0(void) /* Sample time: [0.0001s, 0.0s] */ { /* Update the flag to indicate when data transfers from * Sample time: [0.0001s, 0.0s] to Sample time: [1.0s, 0.0s] */ SquareDebug_M->Timing.perTaskSampleHits[2] = (SquareDebug_M->Timing.RateInteraction.TID0_2 == 0); (SquareDebug_M->Timing.RateInteraction.TID0_2)++; if ((SquareDebug_M->Timing.RateInteraction.TID0_2) > 9999) { SquareDebug_M->Timing.RateInteraction.TID0_2 = 0; } /* Update the flag to indicate when data transfers from * Sample time: [0.0001s, 0.0s] to Sample time: [2.5s, 0.0s] */ SquareDebug_M->Timing.perTaskSampleHits[3] = (SquareDebug_M->Timing.RateInteraction.TID0_3 == 0); (SquareDebug_M->Timing.RateInteraction.TID0_3)++; if ((SquareDebug_M->Timing.RateInteraction.TID0_3) > 24999) { SquareDebug_M->Timing.RateInteraction.TID0_3 = 0; } /* RateTransition generated from: '/Digital output' */ if (SquareDebug_M->Timing.RateInteraction.TID0_3 == 1) { SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Rd = static_cast (SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Rd == 0); } /* RateTransition generated from: '/Digital output' */ SquareDebug_B.TmpRTBAtDigitaloutputInport1 = SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Bu[SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Rd]; /* RateTransition generated from: '/Digital output' */ if (SquareDebug_M->Timing.RateInteraction.TID0_2 == 1) { SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Rd = static_cast (SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Rd == 0); } /* RateTransition generated from: '/Digital output' */ SquareDebug_B.TmpRTBAtDigitaloutputInport2 = SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Bu[SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Rd]; /* S-Function (sg_fpga_do_sf_a2): '/Digital output' */ /* Level2 S-Function Block: '/Digital output' (sg_fpga_do_sf_a2) */ { SimStruct *rts = SquareDebug_M->childSfunctions[0]; sfcnOutputs(rts,0); } /* user code (Output function Trailer for TID0) */ { if (0) { io3xx_sgdma_feedSequential(1); } } /* Update absolute time */ /* The "clockTick0" counts the number of times the code of this task has * been executed. The absolute time is the multiplication of "clockTick0" * and "Timing.stepSize0". Size of "clockTick0" ensures timer will not * overflow during the application lifespan selected. * Timer of this task consists of two 32 bit unsigned integers. * The two integers represent the low bits Timing.clockTick0 and the high bits * Timing.clockTickH0. When the low bit overflows to 0, the high bits increment. */ if (!(++SquareDebug_M->Timing.clockTick0)) { ++SquareDebug_M->Timing.clockTickH0; } SquareDebug_M->Timing.t[0] = SquareDebug_M->Timing.clockTick0 * SquareDebug_M->Timing.stepSize0 + SquareDebug_M->Timing.clockTickH0 * SquareDebug_M->Timing.stepSize0 * 4294967296.0; } /* Model step function for TID1 */ void SquareDebug_step1(void) /* Sample time: [0.5s, 0.0s] */ { /* Update the flag to indicate when data transfers from * Sample time: [0.5s, 0.0s] to Sample time: [1.0s, 0.0s] */ SquareDebug_M->Timing.perTaskSampleHits[6] = (SquareDebug_M->Timing.RateInteraction.TID1_2 == 0); (SquareDebug_M->Timing.RateInteraction.TID1_2)++; if ((SquareDebug_M->Timing.RateInteraction.TID1_2) > 1) { SquareDebug_M->Timing.RateInteraction.TID1_2 = 0; } /* Update the flag to indicate when data transfers from * Sample time: [0.5s, 0.0s] to Sample time: [2.5s, 0.0s] */ SquareDebug_M->Timing.perTaskSampleHits[7] = (SquareDebug_M->Timing.RateInteraction.TID1_3 == 0); (SquareDebug_M->Timing.RateInteraction.TID1_3)++; if ((SquareDebug_M->Timing.RateInteraction.TID1_3) > 4) { SquareDebug_M->Timing.RateInteraction.TID1_3 = 0; } /* RateTransition generated from: '/Scope' */ if (SquareDebug_M->Timing.RateInteraction.TID1_3 == 1) { SquareDebug_DW.TmpRTBAtScopeInport1_RdBufIdx = static_cast (SquareDebug_DW.TmpRTBAtScopeInport1_RdBufIdx == 0); } /* RateTransition generated from: '/Scope' */ SquareDebug_B.TmpRTBAtScopeInport1 = SquareDebug_DW.TmpRTBAtScopeInport1_Buf[SquareDebug_DW.TmpRTBAtScopeInport1_RdBufIdx]; /* RateTransition generated from: '/Scope' */ if (SquareDebug_M->Timing.RateInteraction.TID1_2 == 1) { SquareDebug_DW.TmpRTBAtScopeInport2_RdBufIdx = static_cast (SquareDebug_DW.TmpRTBAtScopeInport2_RdBufIdx == 0); } /* RateTransition generated from: '/Scope' */ SquareDebug_B.TmpRTBAtScopeInport2 = SquareDebug_DW.TmpRTBAtScopeInport2_Buf[SquareDebug_DW.TmpRTBAtScopeInport2_RdBufIdx]; /* Update absolute time */ /* The "clockTick1" counts the number of times the code of this task has * been executed. The resolution of this integer timer is 0.5, which is the step size * of the task. Size of "clockTick1" ensures timer will not overflow during the * application lifespan selected. * Timer of this task consists of two 32 bit unsigned integers. * The two integers represent the low bits Timing.clockTick1 and the high bits * Timing.clockTickH1. When the low bit overflows to 0, the high bits increment. */ SquareDebug_M->Timing.clockTick1++; if (!SquareDebug_M->Timing.clockTick1) { SquareDebug_M->Timing.clockTickH1++; } } /* Model step function for TID2 */ void SquareDebug_step2(void) /* Sample time: [1.0s, 0.0s] */ { /* DiscretePulseGenerator: '/Pulse Generator1' */ SquareDebug_B.PulseGenerator1 = (SquareDebug_DW.clockTickCounter < SquareDebug_cal->PulseGenerator1_Duty) && (SquareDebug_DW.clockTickCounter >= 0) ? SquareDebug_cal->PulseGenerator1_Amp : 0.0; /* DiscretePulseGenerator: '/Pulse Generator1' */ if (SquareDebug_DW.clockTickCounter >= SquareDebug_cal->PulseGenerator1_Period - 1.0) { SquareDebug_DW.clockTickCounter = 0; } else { SquareDebug_DW.clockTickCounter++; } /* RateTransition generated from: '/Digital output' */ SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Wr = static_cast (SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Wr == 0); SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Bu[SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Wr] = SquareDebug_B.PulseGenerator1; /* RateTransition generated from: '/Scope' */ SquareDebug_DW.TmpRTBAtScopeInport2_WrBufIdx = static_cast (SquareDebug_DW.TmpRTBAtScopeInport2_WrBufIdx == 0); SquareDebug_DW.TmpRTBAtScopeInport2_Buf[SquareDebug_DW.TmpRTBAtScopeInport2_WrBufIdx] = SquareDebug_B.PulseGenerator1; /* Update absolute time */ /* The "clockTick2" counts the number of times the code of this task has * been executed. The resolution of this integer timer is 1.0, which is the step size * of the task. Size of "clockTick2" ensures timer will not overflow during the * application lifespan selected. * Timer of this task consists of two 32 bit unsigned integers. * The two integers represent the low bits Timing.clockTick2 and the high bits * Timing.clockTickH2. When the low bit overflows to 0, the high bits increment. */ SquareDebug_M->Timing.clockTick2++; if (!SquareDebug_M->Timing.clockTick2) { SquareDebug_M->Timing.clockTickH2++; } } /* Model step function for TID3 */ void SquareDebug_step3(void) /* Sample time: [2.5s, 0.0s] */ { /* DiscretePulseGenerator: '/Pulse Generator' */ SquareDebug_B.PulseGenerator = (SquareDebug_DW.clockTickCounter_p < SquareDebug_cal->PulseGenerator_Duty) && (SquareDebug_DW.clockTickCounter_p >= 0) ? SquareDebug_cal->PulseGenerator_Amp : 0.0; /* DiscretePulseGenerator: '/Pulse Generator' */ if (SquareDebug_DW.clockTickCounter_p >= SquareDebug_cal->PulseGenerator_Period - 1.0) { SquareDebug_DW.clockTickCounter_p = 0; } else { SquareDebug_DW.clockTickCounter_p++; } /* RateTransition generated from: '/Digital output' */ SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Wr = static_cast (SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Wr == 0); SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Bu[SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Wr] = SquareDebug_B.PulseGenerator; /* RateTransition generated from: '/Scope' */ SquareDebug_DW.TmpRTBAtScopeInport1_WrBufIdx = static_cast (SquareDebug_DW.TmpRTBAtScopeInport1_WrBufIdx == 0); SquareDebug_DW.TmpRTBAtScopeInport1_Buf[SquareDebug_DW.TmpRTBAtScopeInport1_WrBufIdx] = SquareDebug_B.PulseGenerator; /* Update absolute time */ /* The "clockTick3" counts the number of times the code of this task has * been executed. The resolution of this integer timer is 2.5, which is the step size * of the task. Size of "clockTick3" ensures timer will not overflow during the * application lifespan selected. * Timer of this task consists of two 32 bit unsigned integers. * The two integers represent the low bits Timing.clockTick3 and the high bits * Timing.clockTickH3. When the low bit overflows to 0, the high bits increment. */ SquareDebug_M->Timing.clockTick3++; if (!SquareDebug_M->Timing.clockTick3) { SquareDebug_M->Timing.clockTickH3++; } } /* Model initialize function */ void SquareDebug_initialize(void) { /* Registration code */ /* initialize non-finites */ rt_InitInfAndNaN(sizeof(real_T)); /* Set task counter limit used by the static main program */ (SquareDebug_M)->Timing.TaskCounters.cLimit[0] = 1; (SquareDebug_M)->Timing.TaskCounters.cLimit[1] = 5000; (SquareDebug_M)->Timing.TaskCounters.cLimit[2] = 10000; (SquareDebug_M)->Timing.TaskCounters.cLimit[3] = 25000; rtsiSetSolverName(&SquareDebug_M->solverInfo,"FixedStepDiscrete"); SquareDebug_M->solverInfoPtr = (&SquareDebug_M->solverInfo); /* Initialize timing info */ { int_T *mdlTsMap = SquareDebug_M->Timing.sampleTimeTaskIDArray; mdlTsMap[0] = 0; mdlTsMap[1] = 1; mdlTsMap[2] = 2; mdlTsMap[3] = 3; /* polyspace +2 MISRA2012:D4.1 [Justified:Low] "SquareDebug_M points to static memory which is guaranteed to be non-NULL" */ SquareDebug_M->Timing.sampleTimeTaskIDPtr = (&mdlTsMap[0]); SquareDebug_M->Timing.sampleTimes = (&SquareDebug_M-> Timing.sampleTimesArray[0]); SquareDebug_M->Timing.offsetTimes = (&SquareDebug_M-> Timing.offsetTimesArray[0]); /* task periods */ SquareDebug_M->Timing.sampleTimes[0] = (0.0001); SquareDebug_M->Timing.sampleTimes[1] = (0.5); SquareDebug_M->Timing.sampleTimes[2] = (1.0); SquareDebug_M->Timing.sampleTimes[3] = (2.5); /* task offsets */ SquareDebug_M->Timing.offsetTimes[0] = (0.0); SquareDebug_M->Timing.offsetTimes[1] = (0.0); SquareDebug_M->Timing.offsetTimes[2] = (0.0); SquareDebug_M->Timing.offsetTimes[3] = (0.0); } rtmSetTPtr(SquareDebug_M, &SquareDebug_M->Timing.tArray[0]); { int_T *mdlSampleHits = SquareDebug_M->Timing.sampleHitArray; int_T *mdlPerTaskSampleHits = SquareDebug_M->Timing.perTaskSampleHitsArray; SquareDebug_M->Timing.perTaskSampleHits = (&mdlPerTaskSampleHits[0]); mdlSampleHits[0] = 1; SquareDebug_M->Timing.sampleHits = (&mdlSampleHits[0]); } rtmSetTFinal(SquareDebug_M, -1); SquareDebug_M->Timing.stepSize0 = 0.0001; SquareDebug_M->solverInfoPtr = (&SquareDebug_M->solverInfo); SquareDebug_M->Timing.stepSize = (0.0001); rtsiSetFixedStepSize(&SquareDebug_M->solverInfo, 0.0001); rtsiSetSolverMode(&SquareDebug_M->solverInfo, SOLVER_MODE_MULTITASKING); /* block I/O */ (void) std::memset((static_cast(&SquareDebug_B)), 0, sizeof(B_SquareDebug_T)); /* states (dwork) */ (void) std::memset(static_cast(&SquareDebug_DW), 0, sizeof(DW_SquareDebug_T)); /* child S-Function registration */ { RTWSfcnInfo *sfcnInfo = &SquareDebug_M->NonInlinedSFcns.sfcnInfo; SquareDebug_M->sfcnInfo = (sfcnInfo); rtssSetErrorStatusPtr(sfcnInfo, (&rtmGetErrorStatus(SquareDebug_M))); SquareDebug_M->Sizes.numSampTimes = (4); rtssSetNumRootSampTimesPtr(sfcnInfo, &SquareDebug_M->Sizes.numSampTimes); SquareDebug_M->NonInlinedSFcns.taskTimePtrs[0] = (&rtmGetTPtr(SquareDebug_M) [0]); SquareDebug_M->NonInlinedSFcns.taskTimePtrs[1] = (&rtmGetTPtr(SquareDebug_M) [1]); SquareDebug_M->NonInlinedSFcns.taskTimePtrs[2] = (&rtmGetTPtr(SquareDebug_M) [2]); SquareDebug_M->NonInlinedSFcns.taskTimePtrs[3] = (&rtmGetTPtr(SquareDebug_M) [3]); rtssSetTPtrPtr(sfcnInfo,SquareDebug_M->NonInlinedSFcns.taskTimePtrs); rtssSetTStartPtr(sfcnInfo, &rtmGetTStart(SquareDebug_M)); rtssSetTFinalPtr(sfcnInfo, &rtmGetTFinal(SquareDebug_M)); rtssSetTimeOfLastOutputPtr(sfcnInfo, &rtmGetTimeOfLastOutput(SquareDebug_M)); rtssSetStepSizePtr(sfcnInfo, &SquareDebug_M->Timing.stepSize); rtssSetStopRequestedPtr(sfcnInfo, &rtmGetStopRequested(SquareDebug_M)); rtssSetDerivCacheNeedsResetPtr(sfcnInfo, &SquareDebug_M->derivCacheNeedsReset); rtssSetZCCacheNeedsResetPtr(sfcnInfo, &SquareDebug_M->zCCacheNeedsReset); rtssSetContTimeOutputInconsistentWithStateAtMajorStepPtr(sfcnInfo, &SquareDebug_M->CTOutputIncnstWithState); rtssSetSampleHitsPtr(sfcnInfo, &SquareDebug_M->Timing.sampleHits); rtssSetPerTaskSampleHitsPtr(sfcnInfo, &SquareDebug_M->Timing.perTaskSampleHits); rtssSetSimModePtr(sfcnInfo, &SquareDebug_M->simMode); rtssSetSolverInfoPtr(sfcnInfo, &SquareDebug_M->solverInfoPtr); } SquareDebug_M->Sizes.numSFcns = (1); /* register each child */ { (void) std::memset(static_cast (&SquareDebug_M->NonInlinedSFcns.childSFunctions[0]), 0, 1*sizeof(SimStruct)); SquareDebug_M->childSfunctions = (&SquareDebug_M->NonInlinedSFcns.childSFunctionPtrs[0]); SquareDebug_M->childSfunctions[0] = (&SquareDebug_M->NonInlinedSFcns.childSFunctions[0]); /* Level2 S-Function Block: SquareDebug//Digital output (sg_fpga_do_sf_a2) */ { SimStruct *rts = SquareDebug_M->childSfunctions[0]; /* timing info */ time_T *sfcnPeriod = SquareDebug_M->NonInlinedSFcns.Sfcn0.sfcnPeriod; time_T *sfcnOffset = SquareDebug_M->NonInlinedSFcns.Sfcn0.sfcnOffset; int_T *sfcnTsMap = SquareDebug_M->NonInlinedSFcns.Sfcn0.sfcnTsMap; (void) std::memset(static_cast(sfcnPeriod), 0, sizeof(time_T)*1); (void) std::memset(static_cast(sfcnOffset), 0, sizeof(time_T)*1); ssSetSampleTimePtr(rts, &sfcnPeriod[0]); ssSetOffsetTimePtr(rts, &sfcnOffset[0]); ssSetSampleTimeTaskIDPtr(rts, sfcnTsMap); { ssSetBlkInfo2Ptr(rts, &SquareDebug_M->NonInlinedSFcns.blkInfo2[0]); } _ssSetBlkInfo2PortInfo2Ptr(rts, &SquareDebug_M->NonInlinedSFcns.inputOutputPortInfo2[0]); /* Set up the mdlInfo pointer */ ssSetRTWSfcnInfo(rts, SquareDebug_M->sfcnInfo); /* Allocate memory of model methods 2 */ { ssSetModelMethods2(rts, &SquareDebug_M->NonInlinedSFcns.methods2[0]); } /* Allocate memory of model methods 3 */ { ssSetModelMethods3(rts, &SquareDebug_M->NonInlinedSFcns.methods3[0]); } /* Allocate memory of model methods 4 */ { ssSetModelMethods4(rts, &SquareDebug_M->NonInlinedSFcns.methods4[0]); } /* Allocate memory for states auxilliary information */ { ssSetStatesInfo2(rts, &SquareDebug_M->NonInlinedSFcns.statesInfo2[0]); ssSetPeriodicStatesInfo(rts, &SquareDebug_M->NonInlinedSFcns.periodicStatesInfo[0]); } /* inputs */ { _ssSetNumInputPorts(rts, 2); ssSetPortInfoForInputs(rts, &SquareDebug_M->NonInlinedSFcns.Sfcn0.inputPortInfo[0]); ssSetPortInfoForInputs(rts, &SquareDebug_M->NonInlinedSFcns.Sfcn0.inputPortInfo[0]); _ssSetPortInfo2ForInputUnits(rts, &SquareDebug_M->NonInlinedSFcns.Sfcn0.inputPortUnits[0]); ssSetInputPortUnit(rts, 0, 0); ssSetInputPortUnit(rts, 1, 0); _ssSetPortInfo2ForInputCoSimAttribute(rts, &SquareDebug_M->NonInlinedSFcns.Sfcn0.inputPortCoSimAttribute[0]); ssSetInputPortIsContinuousQuantity(rts, 0, 0); ssSetInputPortIsContinuousQuantity(rts, 1, 0); /* port 0 */ { ssSetInputPortRequiredContiguous(rts, 0, 1); ssSetInputPortSignal(rts, 0, &SquareDebug_B.TmpRTBAtDigitaloutputInport1); _ssSetInputPortNumDimensions(rts, 0, 1); ssSetInputPortWidthAsInt(rts, 0, 1); } /* port 1 */ { ssSetInputPortRequiredContiguous(rts, 1, 1); ssSetInputPortSignal(rts, 1, &SquareDebug_B.TmpRTBAtDigitaloutputInport2); _ssSetInputPortNumDimensions(rts, 1, 1); ssSetInputPortWidthAsInt(rts, 1, 1); } } /* path info */ ssSetModelName(rts, "Digital output"); ssSetPath(rts, "SquareDebug/Digital output"); ssSetRTModel(rts,SquareDebug_M); ssSetParentSS(rts, (NULL)); ssSetRootSS(rts, rts); ssSetVersion(rts, SIMSTRUCT_VERSION_LEVEL2); /* parameters */ { mxArray **sfcnParams = (mxArray **) &SquareDebug_M->NonInlinedSFcns.Sfcn0.params; ssSetSFcnParamsCount(rts, 6); ssSetSFcnParamsPtr(rts, &sfcnParams[0]); ssSetSFcnParam(rts, 0, (mxArray*)SquareDebug_cal->Digitaloutput_P1_Size); ssSetSFcnParam(rts, 1, (mxArray*)SquareDebug_cal->Digitaloutput_P2_Size); ssSetSFcnParam(rts, 2, (mxArray*)SquareDebug_cal->Digitaloutput_P3_Size); ssSetSFcnParam(rts, 3, (mxArray*)SquareDebug_cal->Digitaloutput_P4_Size); ssSetSFcnParam(rts, 4, (mxArray*)SquareDebug_cal->Digitaloutput_P5_Size); ssSetSFcnParam(rts, 5, (mxArray*)SquareDebug_cal->Digitaloutput_P6_Size); } /* work vectors */ ssSetPWork(rts, (void **) &SquareDebug_DW.Digitaloutput_PWORK[0]); { struct _ssDWorkRecord *dWorkRecord = (struct _ssDWorkRecord *) &SquareDebug_M->NonInlinedSFcns.Sfcn0.dWork; struct _ssDWorkAuxRecord *dWorkAuxRecord = (struct _ssDWorkAuxRecord *) &SquareDebug_M->NonInlinedSFcns.Sfcn0.dWorkAux; ssSetSFcnDWork(rts, dWorkRecord); ssSetSFcnDWorkAux(rts, dWorkAuxRecord); ssSetNumDWorkAsInt(rts, 1); /* PWORK */ ssSetDWorkWidthAsInt(rts, 0, 2); ssSetDWorkDataType(rts, 0,SS_POINTER); ssSetDWorkComplexSignal(rts, 0, 0); ssSetDWork(rts, 0, &SquareDebug_DW.Digitaloutput_PWORK[0]); } /* registration */ sg_fpga_do_sf_a2(rts); sfcnInitializeSizes(rts); sfcnInitializeSampleTimes(rts); /* adjust sample time */ ssSetSampleTime(rts, 0, 0.0001); ssSetOffsetTime(rts, 0, 0.0); sfcnTsMap[0] = 0; /* set compiled values of dynamic vector attributes */ ssSetNumNonsampledZCsAsInt(rts, 0); /* Update connectivity flags for each port */ _ssSetInputPortConnected(rts, 0, 1); _ssSetInputPortConnected(rts, 1, 1); /* Update the BufferDstPort flags for each input port */ ssSetInputPortBufferDstPort(rts, 0, -1); ssSetInputPortBufferDstPort(rts, 1, -1); } } /* Start for S-Function (sg_fpga_do_sf_a2): '/Digital output' */ /* Level2 S-Function Block: '/Digital output' (sg_fpga_do_sf_a2) */ { SimStruct *rts = SquareDebug_M->childSfunctions[0]; sfcnStart(rts); if (ssGetErrorStatus(rts) != (NULL)) return; } /* Start for DiscretePulseGenerator: '/Pulse Generator1' */ SquareDebug_DW.clockTickCounter = 0; /* Start for DiscretePulseGenerator: '/Pulse Generator' */ SquareDebug_DW.clockTickCounter_p = 0; /* InitializeConditions for RateTransition generated from: '/Digital output' */ SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Bu[0] = SquareDebug_cal->TmpRTBAtDigitaloutputInport1_In; SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Wr = 0; SquareDebug_DW.TmpRTBAtDigitaloutputInport1_Rd = 1; /* InitializeConditions for RateTransition generated from: '/Digital output' */ SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Bu[0] = SquareDebug_cal->TmpRTBAtDigitaloutputInport2_In; SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Wr = 0; SquareDebug_DW.TmpRTBAtDigitaloutputInport2_Rd = 1; /* InitializeConditions for RateTransition generated from: '/Scope' */ SquareDebug_DW.TmpRTBAtScopeInport1_Buf[0] = SquareDebug_cal->TmpRTBAtScopeInport1_InitialCon; SquareDebug_DW.TmpRTBAtScopeInport1_WrBufIdx = 0; SquareDebug_DW.TmpRTBAtScopeInport1_RdBufIdx = 1; /* InitializeConditions for RateTransition generated from: '/Scope' */ SquareDebug_DW.TmpRTBAtScopeInport2_Buf[0] = SquareDebug_cal->TmpRTBAtScopeInport2_InitialCon; SquareDebug_DW.TmpRTBAtScopeInport2_WrBufIdx = 0; SquareDebug_DW.TmpRTBAtScopeInport2_RdBufIdx = 1; } /* Model terminate function */ void SquareDebug_terminate(void) { /* Terminate for S-Function (sg_fpga_do_sf_a2): '/Digital output' */ /* Level2 S-Function Block: '/Digital output' (sg_fpga_do_sf_a2) */ { SimStruct *rts = SquareDebug_M->childSfunctions[0]; sfcnTerminate(rts); } /* user code (Terminate function Trailer) */ { uintptr_t bar2Addr; volatile io3xx_pull *ptrIO31x_pull; volatile io3xx_2x *ptrio3xx_2x; uint16_t moduleArchitecture; sg_fpga_io3xxModuleIdT moduleId; static char msg[500]; // Get module IDs (PIC info) sg_fpga_IO3xxGetModuleId(39750, &moduleId); moduleArchitecture = moduleId.moduleArchitecture; SG_PRINTF(DEBUG, "moduleArchitecture %d\n",moduleArchitecture); if (moduleArchitecture == TEWS_TXMC) { // Get pointer to io31x_pull bar2Addr = (uintptr_t)io3xxGetAddressSgLib((int32_t)1, SG_FPGA_IO3XX_BAR2); if (bar2Addr == 0) { sprintf(msg, "%s", pSgErrorStr); rtmSetErrorStatus(SquareDebug_M, msg); SG_PRINTF(ERROR,msg); return; } ptrIO31x_pull = (io3xx_pull *)((uintptr_t)bar2Addr + IO3xx_PULL_BASE); // Disable pull resistors ptrIO31x_pull->enable = 0x0; // disable } // Pull down and disable DIOs if ((1 == 2) || (1 == 3)) { bar2Addr = (uintptr_t)io3xxGetAddressSgLib((int32_t)1, SG_FPGA_IO3XX_BAR2); if (bar2Addr == 0) { sprintf(msg, "%s", pSgErrorStr); rtmSetErrorStatus(SquareDebug_M, msg); SG_PRINTF(ERROR,msg); return; } ptrio3xx_2x = (io3xx_2x *)((uintptr_t)bar2Addr +IO3xx_2x_BASE); ptrio3xx_2x->pull = 0xffffffff; // pull down ptrio3xx_2x->dir = 0x0; // input ptrio3xx_2x->update = 0x1; sg_wait_s(SG_FPGA_WAIT_TIME_100us); ptrio3xx_2x->update = 0x0; sg_wait_s(SG_FPGA_WAIT_TIME_1ms); #if DEBUGGING // For debugging output port register of IO-Expander sg_wait_s(SG_FPGA_WAIT_TIME_100ms); SG_PRINTF(INFO, "last configuration from mdl start\n"); SG_PRINTF(INFO, "rxData of Expander1: 0x%X\n", ptrio3xx_2x->rxDataExpander1); SG_PRINTF(INFO, "rxData of Expander2: 0x%X\n", ptrio3xx_2x->rxDataExpander2); SG_PRINTF(INFO, "rxData of Expander3: 0x%X\n", ptrio3xx_2x->rxDataExpander3); SG_PRINTF(INFO, "rxData of Expander4: 0x%X\n", ptrio3xx_2x->rxDataExpander4); #endif } else if (1 == 4) { IO3xx_24_terminate(1); } freeFPGAModuleSgLib((uint32_t)1); } }