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control/Deprecated/DEBUG Control/SquareDebug/SquareDebug_sg_rtw/SquareDebug.h
Pedro Romero 4c39fa3e96 Organización
2025-09-03 11:21:53 +02:00

374 lines
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/*
* SquareDebug.h
*
* Academic License - for use in teaching, academic research, and meeting
* course requirements at degree granting institutions only. Not for
* government, commercial, or other organizational use.
*
* Code generation for model "SquareDebug".
*
* Model version : 1.1
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C++ source code generated on : Thu Oct 10 10:54:01 2024
*
* Target selection: speedgoat.tlc
* Note: GRT includes extra infrastructure and instrumentation for prototyping
* Embedded hardware selection: Intel->x86-64 (Linux 64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#ifndef SquareDebug_h_
#define SquareDebug_h_
#include "rtwtypes.h"
#include "simstruc.h"
#include "fixedpoint.h"
#include "sg_fpga_io30x_setup_util.h"
#include "sg_fpga_io31x_io32x_setup_util.h"
#include "sg_fpga_io33x_setup_util.h"
#include "sg_fpga_io36x_setup_util.h"
#include "sg_fpga_io39x_setup_util.h"
#include "sg_fpga_io3xx_scatter_gather_dma.h"
#include "sg_common.h"
#include "sg_printf.h"
#include "SquareDebug_types.h"
#include <stddef.h>
#include <cstring>
#include "SquareDebug_cal.h"
extern "C"
{
#include "rt_nonfinite.h"
}
/* Macros for accessing real-time model data structure */
#ifndef rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag
#define rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm) ((rtm)->CTOutputIncnstWithState)
#endif
#ifndef rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag
#define rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm, val) ((rtm)->CTOutputIncnstWithState = (val))
#endif
#ifndef rtmGetDerivCacheNeedsReset
#define rtmGetDerivCacheNeedsReset(rtm) ((rtm)->derivCacheNeedsReset)
#endif
#ifndef rtmSetDerivCacheNeedsReset
#define rtmSetDerivCacheNeedsReset(rtm, val) ((rtm)->derivCacheNeedsReset = (val))
#endif
#ifndef rtmGetFinalTime
#define rtmGetFinalTime(rtm) ((rtm)->Timing.tFinal)
#endif
#ifndef rtmGetSampleHitArray
#define rtmGetSampleHitArray(rtm) ((rtm)->Timing.sampleHitArray)
#endif
#ifndef rtmGetStepSize
#define rtmGetStepSize(rtm) ((rtm)->Timing.stepSize)
#endif
#ifndef rtmGetZCCacheNeedsReset
#define rtmGetZCCacheNeedsReset(rtm) ((rtm)->zCCacheNeedsReset)
#endif
#ifndef rtmSetZCCacheNeedsReset
#define rtmSetZCCacheNeedsReset(rtm, val) ((rtm)->zCCacheNeedsReset = (val))
#endif
#ifndef rtmGet_TimeOfLastOutput
#define rtmGet_TimeOfLastOutput(rtm) ((rtm)->Timing.timeOfLastOutput)
#endif
#ifndef rtmCounterLimit
#define rtmCounterLimit(rtm, idx) ((rtm)->Timing.TaskCounters.cLimit[(idx)])
#endif
#ifndef rtmGetErrorStatus
#define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
#endif
#ifndef rtmSetErrorStatus
#define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
#endif
#ifndef rtmStepTask
#define rtmStepTask(rtm, idx) ((rtm)->Timing.TaskCounters.TID[(idx)] == 0)
#endif
#ifndef rtmGetStopRequested
#define rtmGetStopRequested(rtm) ((rtm)->Timing.stopRequestedFlag)
#endif
#ifndef rtmSetStopRequested
#define rtmSetStopRequested(rtm, val) ((rtm)->Timing.stopRequestedFlag = (val))
#endif
#ifndef rtmGetStopRequestedPtr
#define rtmGetStopRequestedPtr(rtm) (&((rtm)->Timing.stopRequestedFlag))
#endif
#ifndef rtmGetT
#define rtmGetT(rtm) (rtmGetTPtr((rtm))[0])
#endif
#ifndef rtmGetTFinal
#define rtmGetTFinal(rtm) ((rtm)->Timing.tFinal)
#endif
#ifndef rtmGetTPtr
#define rtmGetTPtr(rtm) ((rtm)->Timing.t)
#endif
#ifndef rtmGetTStart
#define rtmGetTStart(rtm) ((rtm)->Timing.tStart)
#endif
#ifndef rtmTaskCounter
#define rtmTaskCounter(rtm, idx) ((rtm)->Timing.TaskCounters.TID[(idx)])
#endif
#ifndef rtmGetTimeOfLastOutput
#define rtmGetTimeOfLastOutput(rtm) ((rtm)->Timing.timeOfLastOutput)
#endif
/* Block signals (default storage) */
struct B_SquareDebug_T {
real_T TmpRTBAtDigitaloutputInport1; /* '<Root>/Pulse Generator' */
real_T TmpRTBAtDigitaloutputInport2; /* '<Root>/Pulse Generator1' */
real_T TmpRTBAtScopeInport1; /* '<Root>/Pulse Generator' */
real_T TmpRTBAtScopeInport2; /* '<Root>/Pulse Generator1' */
real_T PulseGenerator1; /* '<Root>/Pulse Generator1' */
real_T PulseGenerator; /* '<Root>/Pulse Generator' */
};
/* Block states (default storage) for system '<Root>' */
struct DW_SquareDebug_T {
real_T TmpRTBAtDigitaloutputInport1_Bu[2];/* synthesized block */
real_T TmpRTBAtDigitaloutputInport2_Bu[2];/* synthesized block */
real_T TmpRTBAtScopeInport1_Buf[2]; /* synthesized block */
real_T TmpRTBAtScopeInport2_Buf[2]; /* synthesized block */
void *Digitaloutput_PWORK[2]; /* '<Root>/Digital output' */
struct {
void *USERIO_P_IND;
void *PROG_SPACE_P_IND;
void *CONFIG_REGISTER_P_IND;
void *CONDITIONING_MODULE_IO3xx_2x_P_IND;
void *DEVICENAME_P_IND;
void *DMA_CONTROLLER_P_IND;
} Setup_PWORK; /* '<Root>/Setup' */
struct {
void *LoggedData[2];
} Scope_PWORK; /* '<Root>/Scope' */
int32_T clockTickCounter; /* '<Root>/Pulse Generator1' */
int32_T clockTickCounter_p; /* '<Root>/Pulse Generator' */
struct {
int_T MODULEARCHITECTURE_I_IND;
} Setup_IWORK; /* '<Root>/Setup' */
int8_T TmpRTBAtDigitaloutputInport1_Rd;/* synthesized block */
int8_T TmpRTBAtDigitaloutputInport1_Wr;/* synthesized block */
int8_T TmpRTBAtDigitaloutputInport2_Rd;/* synthesized block */
int8_T TmpRTBAtDigitaloutputInport2_Wr;/* synthesized block */
int8_T TmpRTBAtScopeInport1_RdBufIdx;/* synthesized block */
int8_T TmpRTBAtScopeInport1_WrBufIdx;/* synthesized block */
int8_T TmpRTBAtScopeInport2_RdBufIdx;/* synthesized block */
int8_T TmpRTBAtScopeInport2_WrBufIdx;/* synthesized block */
};
/* Real-time Model Data Structure */
struct tag_RTM_SquareDebug_T {
struct SimStruct_tag * *childSfunctions;
const char_T *errorStatus;
SS_SimMode simMode;
RTWSolverInfo solverInfo;
RTWSolverInfo *solverInfoPtr;
void *sfcnInfo;
/*
* NonInlinedSFcns:
* The following substructure contains information regarding
* non-inlined s-functions used in the model.
*/
struct {
RTWSfcnInfo sfcnInfo;
time_T *taskTimePtrs[4];
SimStruct childSFunctions[1];
SimStruct *childSFunctionPtrs[1];
struct _ssBlkInfo2 blkInfo2[1];
struct _ssSFcnModelMethods2 methods2[1];
struct _ssSFcnModelMethods3 methods3[1];
struct _ssSFcnModelMethods4 methods4[1];
struct _ssStatesInfo2 statesInfo2[1];
ssPeriodicStatesInfo periodicStatesInfo[1];
struct _ssPortInfo2 inputOutputPortInfo2[1];
struct {
time_T sfcnPeriod[1];
time_T sfcnOffset[1];
int_T sfcnTsMap[1];
struct _ssPortInputs inputPortInfo[2];
struct _ssInPortUnit inputPortUnits[2];
struct _ssInPortCoSimAttribute inputPortCoSimAttribute[2];
uint_T attribs[6];
mxArray *params[6];
struct _ssDWorkRecord dWork[1];
struct _ssDWorkAuxRecord dWorkAux[1];
} Sfcn0;
} NonInlinedSFcns;
boolean_T zCCacheNeedsReset;
boolean_T derivCacheNeedsReset;
boolean_T CTOutputIncnstWithState;
/*
* Sizes:
* The following substructure contains sizes information
* for many of the model attributes such as inputs, outputs,
* dwork, sample times, etc.
*/
struct {
uint32_T options;
int_T numContStates;
int_T numU;
int_T numY;
int_T numSampTimes;
int_T numBlocks;
int_T numBlockIO;
int_T numBlockPrms;
int_T numDwork;
int_T numSFcnPrms;
int_T numSFcns;
int_T numIports;
int_T numOports;
int_T numNonSampZCs;
int_T sysDirFeedThru;
int_T rtwGenSfcn;
} Sizes;
/*
* Timing:
* The following substructure contains information regarding
* the timing information for the model.
*/
struct {
time_T stepSize;
uint32_T clockTick0;
uint32_T clockTickH0;
time_T stepSize0;
uint32_T clockTick1;
uint32_T clockTickH1;
uint32_T clockTick2;
uint32_T clockTickH2;
uint32_T clockTick3;
uint32_T clockTickH3;
struct {
uint16_T TID[4];
uint16_T cLimit[4];
} TaskCounters;
struct {
uint16_T TID0_2;
uint16_T TID0_3;
uint16_T TID1_2;
uint16_T TID1_3;
} RateInteraction;
time_T tStart;
time_T tFinal;
time_T timeOfLastOutput;
boolean_T stopRequestedFlag;
time_T *sampleTimes;
time_T *offsetTimes;
int_T *sampleTimeTaskIDPtr;
int_T *sampleHits;
int_T *perTaskSampleHits;
time_T *t;
time_T sampleTimesArray[4];
time_T offsetTimesArray[4];
int_T sampleTimeTaskIDArray[4];
int_T sampleHitArray[4];
int_T perTaskSampleHitsArray[16];
time_T tArray[4];
} Timing;
};
/* Block signals (default storage) */
#ifdef __cplusplus
extern "C"
{
#endif
extern struct B_SquareDebug_T SquareDebug_B;
#ifdef __cplusplus
}
#endif
/* Block states (default storage) */
extern struct DW_SquareDebug_T SquareDebug_DW;
#ifdef __cplusplus
extern "C"
{
#endif
/* Model entry point functions */
extern void SquareDebug_initialize(void);
extern void SquareDebug_step0(void);
extern void SquareDebug_step1(void);
extern void SquareDebug_step2(void);
extern void SquareDebug_step3(void);
extern void SquareDebug_terminate(void);
#ifdef __cplusplus
}
#endif
/* Real-time Model object */
#ifdef __cplusplus
extern "C"
{
#endif
extern RT_MODEL_SquareDebug_T *const SquareDebug_M;
#ifdef __cplusplus
}
#endif
/*-
* The generated code includes comments that allow you to trace directly
* back to the appropriate location in the model. The basic format
* is <system>/block_name, where system is the system number (uniquely
* assigned by Simulink) and block_name is the name of the block.
*
* Use the MATLAB hilite_system command to trace the generated code back
* to the model. For example,
*
* hilite_system('<S3>') - opens system 3
* hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
*
* Here is the system hierarchy for this model
*
* '<Root>' : 'SquareDebug'
*/
#endif /* SquareDebug_h_ */
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