control/VF Lazo Cerrado/Test_LOGICA_3FPWM_sg_rtw/rtmodel.h
2025-09-03 11:47:17 +02:00

26 lines
845 B
C

/*
* rtmodel.h:
*
* Academic License - for use in teaching, academic research, and meeting
* course requirements at degree granting institutions only. Not for
* government, commercial, or other organizational use.
*
* Code generation for model "Test_LOGICA_3FPWM".
*
* Model version : 1.48
* Simulink Coder version : 24.2 (R2024b) 21-Jun-2024
* C++ source code generated on : Wed Jul 23 11:33:04 2025
*
* Target selection: speedgoat.tlc
* Note: GRT includes extra infrastructure and instrumentation for prototyping
* Embedded hardware selection: Intel->x86-64 (Linux 64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#ifndef rtmodel_h_
#define rtmodel_h_
#include "Test_LOGICA_3FPWM.h"
#define GRTINTERFACE 0
#endif /* rtmodel_h_ */